This document describes the study of an artificial neuron configuration in a dynamically programmable analogue signalprocessor (dpASP) device with embedded Field Programmable analogue Array (FPAA) technology. The lin...
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This document describes the study of an artificial neuron configuration in a dynamically programmable analogue signalprocessor (dpASP) device with embedded Field Programmable analogue Array (FPAA) technology. The linear and non-linear neurons were studied and investigated with respect to device capacity and time of signal processing. A Programmable analogue Controller (PAC) was used to conduct the research. The in-site investigation shows the features and limitations of the switched capacitor technology as well the advantages of hardware-based analogue signal processing. (C) 2015, IFAC (International Federation of Automatic Control) Hosting: by Elsevier Ltd. All rights reserved.
This document describes the study of an artificial neuron configuration in a dynamically programmable analogue signalprocessor (dpASP) device with embedded Field Programmable analogue Array (FPAA) technology. The lin...
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This document describes the study of an artificial neuron configuration in a dynamically programmable analogue signalprocessor (dpASP) device with embedded Field Programmable analogue Array (FPAA) technology. The linear and non-linear neurons were studied and investigated with respect to device capacity and time of signal processing. A Programmable analogue Controller (PAC) was used to conduct the research. The in-site investigation shows the features and limitations of the switched capacitor technology as well the advantages of hardware-based analogue signal processing.
The aim of this paper is to present an overview of a new branch of analog electronics represented by analog reconfigurable circuits. The reconfiguration of analog circuits has been known and used since the beginnings ...
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The aim of this paper is to present an overview of a new branch of analog electronics represented by analog reconfigurable circuits. The reconfiguration of analog circuits has been known and used since the beginnings of electronics, but the universal reconfigurable circuits called Field Programmable analog Arrays (FPAA) have been developed over the last two decades. This paper presents the classification of analog circuit reconfiguration, examples of FPAA solutions obtained as academic projects and commercially available ones, as well as some application examples of the dynamic reconfiguration of FPAA.
The requirements for space-based integrated circuit applications are defined with an emphasis on being radiation tolerant and low power consuming, Flexible analog signal processors (FASPs) are outlined as a means by w...
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The requirements for space-based integrated circuit applications are defined with an emphasis on being radiation tolerant and low power consuming, Flexible analog signal processors (FASPs) are outlined as a means by which effective circuit designs can be utilized to perform a multitude of tasks, The development of complementary III-V technologies have been proven to meet the demands of the space environment, and have demonstrated the potential for frequency operation beyond 1 GHz using power supply voltages at or below 1.5 Volts. The novel fabrication process known as Xs-MET (pronounced kismet, which uses the Creek letter chi, X, and stands for Complementary Heterostructure Integrated Single Metal Transistor), is introduced as a manufacturing technique to be used in FASP design. The Xs-MET fabrication process is outlined with preliminary device results presented. An example of a FASP circuit design using Xs-MET is provided. Conclusions regarding the utilization of the Xs-MET process for FASPs are outlined with comments focusing on a space-based demonstration.
analog signal processors based on continuous-time emulation of sampled-data networks are presented. In these processors, continuous-time signal delay is realized using the phase shift of fixed-frequency, fixed-Q, cont...
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analog signal processors based on continuous-time emulation of sampled-data networks are presented. In these processors, continuous-time signal delay is realized using the phase shift of fixed-frequency, fixed-Q, continuous-time low-pass filters (LPFs), and analog multiplication is accomplished through signal switching using digitally programmable duty cycles. Each coefficient of the processor transfer function is dependently programmable, without requiring selectable capacitor (or resistor) arrays. Experiments verify that this method can be used to construct analogprocessors with arbitrarily programmable frequency responses. The results presented here are complementary to other results presented earlier by the authors, using sample-data delays.
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