Distributed source coding schemes are typically based on the use of channels codes as source codes. In this paper we propose a new paradigm, named "distributed arithmetic coding," which extends arithmetic co...
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Distributed source coding schemes are typically based on the use of channels codes as source codes. In this paper we propose a new paradigm, named "distributed arithmetic coding," which extends arithmetic codes to the distributed case employing sequential decoding aided by the side information. In particular, we introduce a distributed binary arithmetic coder for the Slepian-Wolf coding problem, along with a joint decoder. The proposed scheme can be applied to two sources in both the asymmetric mode, wherein one source acts as side information, and the symmetric mode, wherein both sources are coded with ambiguity, at any combination of achievable rates. Distributed arithmetic coding provides several advantages over existing Slepian-Wolf coders, especially good performance at small block lengths, and the ability to incorporate arbitrary source models in the encoding process, e.g., context-based statistical models, in much the same way as a classical arithmetic coder. We have compared the performance of distributed arithmetic coding with turbo codes and tow-density parity-check codes, and found that the proposed approach is very competitive.
The paper "Secure arithmetic coding" (in IEEE TRANSACTIONS ON SIGNAL PROCESSING, vol. 55, no. 5, pp. 2263-2272, May 2007) presented a novel encryption scheme called the secure arithmetic coding (SAC) based o...
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The paper "Secure arithmetic coding" (in IEEE TRANSACTIONS ON SIGNAL PROCESSING, vol. 55, no. 5, pp. 2263-2272, May 2007) presented a novel encryption scheme called the secure arithmetic coding (SAC) based on the interval splitting arithmetic coding (ISAC) and a series of permutations. In the current work, we study the security of the SAC under an adaptive chosen-ciphertext attack. It is shown that the key vectors used in the codeword permutation step can be recovered with complexity O(N), where N is the symbol sequence length. After getting these key vectors, we can remove the codeword permutation step, and the resulting system has already been shown to be insecure in the original paper. This implies that the SAC is not suitable for the applications where the attacker can have access to the decoder. In addition, we discuss a method to jointly enhance the security and the performance of the SAC.
Embedded block coding with optimized truncation (EBCOT) employed in the JPEG2000 standard accounts for the majority of the processing time, because the EBCOT is full of bit operations that cannot be implemented effici...
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Embedded block coding with optimized truncation (EBCOT) employed in the JPEG2000 standard accounts for the majority of the processing time, because the EBCOT is full of bit operations that cannot be implemented efficiently in software. The block coder consists of a bit-plane coder (BPC) followed by a binary arithmetic coder (BAC), where the most up-to-date BPC architectures are capable of producing symbols at a much higher rate than the conventional BACs can handle. This letter proposes a novel pipelined BAC architecture that can encode input symbols at a much higher rate than the conventional BAC architectures. The proposed architecture can significantly reduce the critical path delay and can achieve a throughput of 400 M symbols/s. The critical path delay synthesized with 0.18 mu m CMOS technology is 2.42 ns, which is almost half of the delay taken in conventional BAC architectures.
this paper investigates the algorithmic complexity of arithmetic coding in the new H264 video coding standard and proposes a processor-coprocessor architecture to reduce it by more than an order of magnitude. The prop...
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this paper investigates the algorithmic complexity of arithmetic coding in the new H264 video coding standard and proposes a processor-coprocessor architecture to reduce it by more than an order of magnitude. The proposed coprocessor is based on an innovative algorithm known as the MZ-coder and maintains the original coding efficiency via a low-complexity, multiplication-free, non-stalling, fully pipelined architecture. The coprocessor achieves a constant throughput for both coding and decoding processes of 1 symbol per cycle and is designed to be attached to a controlling embedded RISC CPU whose instruction set has been extended with arithmetic coding instructions.
arithmetic coding, in conjunction with a suitable probabilistic model, can provide nearly optimal data compression. In this article we analyze the effect that the model and the particular implementation of arithmetic ...
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arithmetic coding, in conjunction with a suitable probabilistic model, can provide nearly optimal data compression. In this article we analyze the effect that the model and the particular implementation of arithmetic coding have on the code length obtained. Periodic scaling is often used in arithmetic coding implementations to reduce time and storage requirements;it also introduces a recency effect which can further affect compression. Our main contribution is introducing the concept of weighted entropy and using it to characterize in an elegant way the effect that periodic scaling has on the code length. We explain why and by how much scaling increases the code length for files with a homogeneous distribution of symbols, and we characterize the reduction in code length due to scaling for files exhibiting locality of reference. We also give a rigorous proof that the coding effects of rounding scaled weights, using integer arithmetic, and encoding end-of-file are negligible.
JPEG2000 is a recently standardized image compression algorithm. The heart of this algorithm is the coding scheme known as embedded block coding with optimal truncation (EBCOT). This contributes the majority of proces...
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JPEG2000 is a recently standardized image compression algorithm. The heart of this algorithm is the coding scheme known as embedded block coding with optimal truncation (EBCOT). This contributes the majority of processing time to the compression algorithm. The EBCOT scheme consists of a bit-plane coder coupled to a MQ arithmetic coder. Recent bit-plane coder architectures are capable of producing symbols at a higher rate than the existing MQ arithmetic coders can absorb. Thus, there is a requirement for a high throughput MQ arithmetic coder. We examine the existing MQ arithmetic coder architectures and develop novel techniques capable of absorbing the high symbol rate from high performance bit-plane coders, as well as providing flexible design choices.
A technique to implement error detection as part of the arithmetic coding process is described, Heuristic arguments are given to show that a small. amount of extra redundancy can be very effective in detecting errors ...
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A technique to implement error detection as part of the arithmetic coding process is described, Heuristic arguments are given to show that a small. amount of extra redundancy can be very effective in detecting errors very quickly, and practical tests confirm this prediction.
arithmetic coding is a technique which converts a given probability distribution into an optimal code and is commonly used in compression schemes. The use of arithmetic coding as an encryption scheme is considered. Th...
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arithmetic coding is a technique which converts a given probability distribution into an optimal code and is commonly used in compression schemes. The use of arithmetic coding as an encryption scheme is considered. The simple case of a single binary probability distribution with a fixed (but unknown) probability is considered. We show that for a chosen plaintext attack w+2 symbols is sufficient to uniquely determine a w-bit probability. For many known plaintexts w+m+O(logm) symbols, where m is the length of an initial sequence containing just one of (the two possible) symbols, is sufficient. It is noted that many extensions to this basic scheme are vulnerable to the same attack provided the arithmetic coder can be repeatedly reset to its initial state. If it cannot be reset then their vulnerability remains an open question.
This paper develops an arithmetic coding algorithm based on delta recurrent neural network for edge computing devices called DRAC. Our algorithm is implemented on a Xilinx Zynq 7000 Soc board. We evaluate DRAC with fo...
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This paper develops an arithmetic coding algorithm based on delta recurrent neural network for edge computing devices called DRAC. Our algorithm is implemented on a Xilinx Zynq 7000 Soc board. We evaluate DRAC with four datasets and compare it with the state-of-the-art compressor DeepZip. The experimental results show that DRAC outperforms DeepZip and achieves 5X speedup ratio and 20X power consumption saving.
Distributed arithmetic coding has been shown to be effective for Slepian-Wolf coding with side information. In this letter, we extend it to rate-compatible coding, which is useful in presence of a feedback channel bet...
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Distributed arithmetic coding has been shown to be effective for Slepian-Wolf coding with side information. In this letter, we extend it to rate-compatible coding, which is useful in presence of a feedback channel between encoder and decoder. The performance loss with respect to the original version is negligible.
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