The robot which makes use of AI as a mode of processing is getting more popular day by day, starting from the autonomous room cleaning robot to Amazon Prime Air. This autonomous robot overtakes traditional robots in f...
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ISBN:
(纸本)9781538681138
The robot which makes use of AI as a mode of processing is getting more popular day by day, starting from the autonomous room cleaning robot to Amazon Prime Air. This autonomous robot overtakes traditional robots in following aspects such as implementing effective decision making in order to reduce the computational overhead by reducing the overall power usage of the robot. In this report, we have designed a low power Ill AIP without compensating in performance. The AIP which we have designed is a 64 processing element that uses parallel processing architecture. A map with 8 different routes is created in Xilinx where it calculates the shortest path from the source to destination using conditional operators. A* algorithm is implemented in Matlab to calculate the shortest distance and Dijkstra's algorithm is converted to VHDL using Vivado HLS coder. A neural network is also created using Matlab to detect and avoid real time obstacle. The overall power report of the processor is implemented in Cadence.
Time-domain analog computing with transient states (TACT) approaches have been proposed to realize high performance artificialintelligence (AI) processors, which have over 100 times higher energy efficiency than the ...
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Time-domain analog computing with transient states (TACT) approaches have been proposed to realize high performance artificialintelligence (AI) processors, which have over 100 times higher energy efficiency than the latest digital AI processors. Such approaches require analog memory devices that can hold and control very high resistance on the order of giga-ohms to tera-ohms, with nonvolatility and rectification. Memory devices with a field-effect transistor (FET) structure can operate in a subthreshold region to realize such high resistance, and can also rectify the current using FET operation. In this paper, we propose using ferroelectric-gate FETs (FeFETs) as a candidate for such devices. We design crossbar circuit architectures for using them, and show measurement results for device characteristics as analog memory devices with pulse control based on TACT approaches, and evaluation results for weighted-sum calculation operation in proof-of-concept FeFET circuits.
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