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HYBRID-WSI - A MASSIVELY PARALLEL COMPUTING TECHNOLOGY

COMPUTER 1993年第4期26卷 50-61页

作者： HABIGER, CM LEA, RM BRUNEL UNIV PARALLEL COMP TECHNOL GRPUXBRIDGE UB8 3PHMIDDXENGLAND

It is argued that although it is not yet clear which of the two wafer scale integration (WSI) forms, monolithic or hybrid, will gain the lead to an enabling technology for second-generation massively parallel computers (MPCs), there are noticeably more backers for hybrid-WSI. The application requirements, implementation problems, and engineering issues of MPCs are discussed. In particular, the associative string processor (ASP) modules, which comprise building blocks for second-generation MPC configurations, are described. The progress reported in developing ASP modules is quantitatively extrapolated to other MPC implementations

关键词： VLSI application requirements associative string processor enabling technology engineering issues hybrid integrated circuits hybrid wafer scale integration implementation problems integrated circuit technology massively parallel computing technology second-generation massively parallel computers

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VLSI AND WSI associative string processorS FOR STRUCTURED DATA-PROCESSING

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IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES 1986年第3期133卷 153-162页

作者： LEA, RM Department of Electrical Engineering and Electronics Brunel University Uxbridge UK

A novel fine-grain parallel-processing microelectronic architecture is proposed as a cost-effective building-block for fifth-generation computer systems. Based on a fully programmable associative string processing computational structure, the architecture provides particularly flexible support and manipulation of abstract data structures over a wide range of information processing tasks. Moreover, the architecture is well suited to the technological constraints of VLSI chip and, especially, WSI device fabrication. The paper describes the ASP (associative string processor) architecture and its instruction set. The style of associative string processing is introduced with three algorithms, illustrating both relational and arithmetic operations. Current projects leading to VLSI ASP chips and WSI ASP devices are discussed and ‘ball-park’ performance figures are given.

关键词： WSI device fabrication associative string processor fully programmable associative string processing computational structure Digital signal processing ASP abstract data structures instruction set structured data processing VLSI ASP chips WSI ASP devices VLSI chip Semiconductor integrated circuits fine-grain parallel-processing microelectronic architecture information processing tasks WSI associative string processors signal processing information theory VLSI fifth-generation computer systems Information theory Signal processing and detection

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SCAPE - A SINGLE-CHIP ARRAY-PROCESSING ELEMENT FOR SIGNAL AND IMAGE-PROCESSING

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IEE PROCEEDINGS-I COMMUNICATIONS SPEECH AND VISION 1986年第3期133卷 105-111页

作者： LEA, RM Department of Electrical Engineering and Electronics Brunel University Uxbridge UK

The SCAPE chip is a practical implementation of a VLSI associative string processor; integrating a string of 256 identical processing elements, each comprising 37 bits of content-addressable memory, a 1-bit adder and logic for communication with other processing elements. Packing 143K transistors on a 73 mm2silicon die, with 2.5 μm p-well (two-layer metal) CMOS design rules, the SCAPE chip is packaged in a 68-pin chip carrier and, operating at 10 MHz, dissipates less than 900 mW. The paper describes the SCAPE chip architecture and floor plan in structural detail. Testability considerations, design verification and SCAPE software are discussed, and the results from recent performance simulation studies are also reported. The SCAPE chip is scheduled for fabrication, by Plessey (Caswell), in the second quarter of 1986.

关键词： Microprocessor chips associative string processor Microprocessors and microcomputers Digital signal processing SCAPE chip SCAPE software CMOS content-addressable memory floor plan Plessey Multiprocessing systems image processing microprocessor chips computerised picture processing VLSI processing elements design verification computerised signal processing single-chip array processing element parallel processing

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