Energy efficient computing is growing in demand as portable systems require energy efficiency in order to maximize the battery life. Memory power consumption is becoming an increasingly larger fraction of the total po...
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ISBN:
(纸本)0819427519
Energy efficient computing is growing in demand as portable systems require energy efficiency in order to maximize the battery life. Memory power consumption is becoming an increasingly larger fraction of the total power consumption of a given system. In this paper, we provide data and insight into how the choice of cache parameters affects memory power consumption of video algorithms. We make use of memory traces generated as a result of running typical MPEG-2 motion estimation algorithms to simulate a large number of cache configurations. The cache simulation data is then combined with on-chip and off-chip memory power models to compute memory power consumption. We provide a detailed study of how varying cache size, block size, and associativity affects memory power consumption. The configurations of particular interest are the ones that optimize power under certain constraints. We also study the role of process technology in these experiments. In particular, we look at how moving to a more advanced process technology for the on-chip cache affects optimal points of operation with respect to memory power consumption.
Memory bandwidth is emerging as the fundamental impediment to higher performance and lower power computer and communication systems. In this paper, we present an analysis of memory bandwidth requirements for the H.263...
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ISBN:
(纸本)0819427497
Memory bandwidth is emerging as the fundamental impediment to higher performance and lower power computer and communication systems. In this paper, we present an analysis of memory bandwidth requirements for the H.263 video codec algorithms. We provide data and insight into how the choice of cache parameters affects external bandwidth requirements of video. We make use of memory traces generated as a result of running Telenor's H.263 video encoder and decoder software implementations to simulate a large number of cache configurations. In the area of analysis of video algorithms, this paper focuses on the following issues: We provide a study of how varying cache size, block size, associativity, replacement policy, and organization parameters such as split versus unified cache affects memory bandwidth requirements. A comparative study of encoder and decoder bandwidth requirements is presented. We also study various advanced encoding options provided with the H.263 standard in this light. based on our study, we provide guidelines for traffic-directed memory system design.
In this paper, a low complexity shape-adaptive DCT algorithm suitable for coding pels in arbitrarily shaped image segments is introduced. In contrast to other techniques described in literature the proposed algorithm ...
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In this paper, a low complexity shape-adaptive DCT algorithm suitable for coding pels in arbitrarily shaped image segments is introduced. In contrast to other techniques described in literature the proposed algorithm is based on predefined orthogonal sets of DCT basis functions and does not require more computations than a normal block DCT. It is shown that the shape-adaptive DCT algorithm can be easily incorporated into existing block-based JPEG, H.261, or MPEG coding schemes. Thus segment or object basedcoding of images and video can be provided with backward compatibility to existing coding standards. As an important feature, with the proposed technique additional content based functionalities currently discussed in the MPEG-4 standardization phase can be readily achieved.
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