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Auto-DOK: Compiler-Assisted Automatic Detection of Offload Kernels for FPGA-HBM Architectures 26

Auto-DOK: Compiler-Assisted Automatic Detection of Offload K...

26th Euromicro Conference on Digital System Design (DSD) / 49th Euromicro Conference on Software Engineering and Advanced Applications (SEAA)

作者： Iskandar, Veronia Abd El Ghany, Mohamed A. Goehringer, Diana Tech Univ Dresden Chair Adapt Dynam Syst Dresden Germany German Univ Cairo IES Lab Elect Dept Egypt TU Darmstadt Darmstadt Germany Ctr Scalable Data Analyt & Artificial Intelligenc Leipzig Germany

ISBN: (纸本)9798350344196

The bandwidth improvement provided by high-bandwidth memory (HBM), and the capability of FPGAs to customize the processing and memory hierarchy, results in a considerable performance increase for memory-intensive workloads such as graph processing, sorting, machine learning, and database analytics. Modern systems integrating 3D-stacked DRAM memory can be leveraged to realize the Near-Memory Computing (NMC) paradigm by offloading some computations to accelerators placed near the HBM. Although numerous studies have investigated efficient accelerators for FPGA-HBM platforms, researchers have not proposed a systematic way for identifying which application kernels are suitable for execution near the HBM. In this article, we propose compiler support for recognizing offloading candidates without any burden on programmers. Auto-DOK analyzes an application code based on criteria derived from the hardware design goals of FPGA-HBM platforms, and automatically identifies kernels suitable for offloading. We evaluate Auto-DOK on benchmarks ranging from microbenchmarks to real-world kernels. Our results show that Auto-DOK can correctly identify kernels and input sizes suitable for execution near the HBM, and prevents slowdown caused by incorrect offloading decisions for other workloads. Moreover, Auto-DOK operates at compile time with negligible overhead and without the need for expensive profiling.

关键词： Parallel Architectures High-bandwidth Memory (HBM) code characterization

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Parallel Program Scaling Analysis using Hardware Counters 21

Parallel Program Scaling Analysis using Hardware Counters

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30th International Symposium on High-Performance Parallel and Distributed Computing (HPDC)

作者： Jagga, Shobhit Malakar, Preeti Indian Inst Technol Kanpur Kanpur Uttar Pradesh India

ISBN: (纸本)9781450382175

We present a lightweight library that automatically collects several hardware counters for MPI applications. We analyze the effect of strong and weak scaling on the counters. We first correlate the counter values obtained from each process count, and then cluster the counters to identify counters that are affected similarly due to scaling. We noted that the effect of last-level cache misses is more pronounced for some applications such as miniFE.

关键词： Performance analysis hardware counter code characterization

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Vidya: Performing code-Block I/O characterization for Data Access Optimization 25

Vidya: Performing Code-Block I/O Characterization for Data A...

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25th IEEE International Conference on High Performance Computing, Data and Analytics (HiPC)

作者： Devarajan, Hariharan Kougkas, Anthony Challa, Prajwal Sun, Xian-He IIT Dept Comp Sci Chicago IL 60616 USA

ISBN: (纸本)9781538683866

Understanding, characterizing and tuning scientific applications' I/O behavior is an increasingly complicated process in HPC systems. Existing tools use either offline profiling or online analysis to get insights into the applications' I/O patterns. However, there is lack of a clear formula to characterize applications' I/O. Moreover, these tools are application specific and do not account for multi-tenant systems. This paper presents Vidya, an I/O profiling framework which can predict application's I/O intensity using a new formula called code-Block I/O characterization (CIOC). Using CIOC, developers and system architects can tune an application's I/O behavior and better match the underlying storage system to maximize performance. Evaluation results show that Vidya can predict an application's I/O intensity with a variance of 0.05%. Vidya can profile applications with a high accuracy of 98% while reducing profiling time by 9x. We further show how Vidya can optimize an application's I/O time by 3.7x.

关键词： I/O Systems I/O profiling I/O optimization code characterization High Performance Computing Systems

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An FPGA-based Prototyping Method for Verification, characterization and Optimization of LDPC Error Correction Systems

An FPGA-based Prototyping Method for Verification, Character...

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International Conference on Embedded Computer Systems - Architectures, Modeling and Simulation (IC-SAMOS)

作者： Sakellariou, P. Tsatsaragkos, I. Kanistras, N. Mahdi, A. Paliouras, V. Univ Patras Elect & Comp Engn Dept Patras 26500 Greece

ISBN: (纸本)9781467322973;9781467322966

This paper introduces a methodology for forward error correction (FEC) architectures prototyping, oriented to system verification and characterization. A complete design flow is described, which satisfies the requirement for error-free hardware design and acceleration of FEC simulations. FPGA devices give the designer the ability to observe rare events, due to tremendous speed-up of FEC operations. A Matlab-based system assists the investigation of the impact of very rare decoding failure events on the FEC system performance and the finding of solutions which aim to parameters optimization and BER performance improvement of LDPC codes in the error floor region. Furthermore, the development of an embedded system, which offers remote access to the system under test and verification process automation, is explored. The presented here prototyping approach exploits the high-processing speed of FPGA-based emulators and the observability and usability of software-based models.

关键词： LDPC FPGA emulation embedded systems verification code characterization error correcting performance

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Generation of user interface from characterized code

Generation of user interface from characterized code

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18th International Conference in Central Europe on Computer Graphics, Visualization and Computer Vision

作者： Kadlec, Jaroslav Zemcik, Pavel Brno Univ Technol Fac Informat Technol Brno 61266 Czech Republic

ISBN: (纸本)9788086943862

Automatic generation of the user interface can simplify development of the computer applications. It can help in the development for various target platforms or in simpler testing and algorithm debugging as the user interface can be created for the actual code and platform taking into account many properties. Process of the automatic generation of the user interface can be supported by the data and code characterization. In this paper, an innovative approach using the data and code characterization is presented. The mechanisms and algorithms describing how the data and code characteristics are loaded, the way how objects are transformed into abstract and specific user interface elements, and the process of finalizing user interface is briefly described. As an example, simple media player is described in every step of the user interface generation process.

关键词： code characterization user interface automatic generation

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A STUDY OF SELECTED SECURITY MEASURES AGAINST NON-LEGITIMATE USE OF code

A STUDY OF SELECTED SECURITY MEASURES AGAINST NON-LEGITIMATE...

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作者： Jhi, Yoon-Chan PennState University Libraries

学位级别：Doctor of Philosophy

As many aspects of social and economic activities rapidly move to networks, computer security has never been more important. Many serious security issues have their origin in non-legitimate use of code. For example, code exploiting a vulnerability can be used in computer worms and viruses; code used without acquiring proper permission could conduct intellectual property theft; or code inserted with a malicious intention may be abused as spyware, botnet, or backdoors to cause many additional security *** this study, we consider two types of security issues that can be caused by a non-legitimate use of program code. First, we investigate self-propagating code, computer worms. To defend against worm spread, we propose PWC, a proactive worm containment solution for enterprises. PWC can stop - instead of just slow down an infected host from releasing worm scans after merely 4 scans. Motivated by the observation that a worm uses a sustained outgoing packet rate, PWC gains infection awareness seconds before a signature or filter can be generated. To overcome denial-of-service possibly caused by such characteristic indicators of infection, PWC develops two new white-host detection (uninfected host detection) techniques: (a) the vulnerability time window lemma, and (b) the relaxation analysis. PWC does not rely on content-based signatures and thus it can quickly contain polymorphic worms. PWC is also resilient to containment evasion. PWC is not sensitive to worm scan rate, and is not protocol specific. Due to white-host detection, PWC causes minimal denial-of-service. Evaluation based on real traces and worm simulations demonstrates that PWC significantly outperforms Virus Throttle [1] in terms of number of released worm scans, number of hosts infected by local scans, and denial-of-service ***, we study detection of illegally reused code. Reusing code can be done with malicious motives. code theft is accomplished by cracking, reverse engineering, breaking

关键词： code detection software plagiarism detection proactive worm containment code identification code characterization

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A comparative workload-based methodology for performance evaluation of parallel computers

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FUTURE GENERATION COMPUTER SYSTEMS 1997年第6期12卷 521-545页

作者： Onbasioglu, E Paker, Y UNIV LONDON QUEEN MARY & WESTFIELD COLL DEPT COMP SCILONDON E1 4NSENGLAND

A practical methodology for evaluating and comparing the performance of distributed memory Multiple Instruction Multiple Data (MIMD) systems is presented. The methodology determines machine parameters and program parameters separately, and predicts the performance of a given workload oh the machines under consideration. Machine parameters are measured using benchmarks that consist of parallel algorithm structures. The methodology takes a workload-based approach in which a mix of application programs constitutes the workload. Performance of different systems are compared, under the given workload, using the ratio of their speeds. In order to validate the methodology, an example workload has been constructed and the time estimates have been compared with the actual runs, yielding good predicted values. Variations in the workload are analysed in terms of increase in problem sizes and changes in the frequency of particular algorithm groups. Utilization and scalability are used to compare the systems when the number of processors is increased. Tt has been shown that performance of parallel computers is sensitive to the changes in the workload and therefore any evaluation and comparison must consider a given user workload. Performance improvement that can be obtained by increasing the size of a distributed memory MIMD system depends on the characteristics of the workload as well as the parameters that characterize the communication speed of the parallel system.

关键词： code characterization execution time prediction machine characterization MIMD performance parallel algorithms parallel computers performance evaluation performance prediction workload-based performance comparison

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Charakterizace Kódu pro Automatické Generování Uživatelského Rozhraní

Charakterizace Kódu pro Automatické Generování Uživatel...

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作者： Kadlec, Jaroslav Brno University of Technology

Práce představuje nový přístup v automatizovaném vytváření uživatelských rozhraní. Na základě taxonomie pro charakterizaci dat byla vyvinuta nová taxonomie pro charak... 详细信息

Práce představuje nový přístup v automatizovaném vytváření uživatelských rozhraní. Na základě taxonomie pro charakterizaci dat byla vyvinuta nová taxonomie pro charakterizaci kódu. Tato taxonomie označuje významné vlastnosti dat a kódu tak, aby ji bylo možné použít v procesu automatického vytvoření uživatelského rozhraní. Taxonomie je platformově nezávislá a může být uložena jako součást metadat nebo v externím souboru. Na základě taxonomie je představený proces automatického vytvoření uživatelského rozhraní s detailnějším popisem jednotlivých kroků. Celý proces generování uživatelského rozhraní je demonstrován na příkladech.

关键词： user interface taxonomy data characterization code characterization automation automated user interface creation evaluation layout design uživatelská rozhraní taxonomie charakterizace dat charakterizace kódu automatizace automatické generován

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