检索结果-内蒙古大学图书馆

code compression for VLIW embedded systems using a self-generating table

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 2007年第10期15卷 1160-1171页

作者： Lin, Chang Hong Xie, Yuan Wolf, Wayne Princeton Univ Dept Elect Engn Princeton NJ 08544 USA Georgia Inst Technol Sch Elect & Comp Engn Atlanta GA 30332 USA

We propose a new class of methods for VLIW code compression using variable-sized branch blocks with self-generating tables. code compression traditionally works on fixed-sized blocks with its efficiency limited by their small size. A branch block, a series of instructions between two consecutive possible branch targets, provides larger blocks for code compression. We compare three methods for compressing branch blocks: table-based, Lempel-Ziv-Welch (LZW)-based and selective code compression. Our approaches are fully adaptive and generate the coding table on-the-fly during compression and decompression. When encountering a branch target, the coding table is cleared to ensure correctness. Decompression requires a simple table lookup and updates the coding table when necessary. When decoding sequentially, the table-based method produces 4 bytes per iteration while the LZW-based methods provide 8 bytes peak and 1.82 bytes average decompression bandwidth. Compared to Huffman's 1 byte and variable-to-fixed (V2F)'s 13-bit peak performance, our methods have higher decoding bandwidth and a comparable compression ratio. Parallel decompression could also be applied to our methods, which is more suitable for VLIW architectures.

关键词： code compression VLIW architecture

来源：评论

学校读者我要写书评

暂无评论

code compression using Huffman and Dictionary-based Pattern Blocks

引用

IEEE LATIN AMERICA TRANSACTIONS 2015年第7期13卷 2314-2321页

作者： Dias, W. R. A. Moreno, E. D. Inst Fed Sergipe Coordenadoria Informat COINF Itabaiana Sergipe Brazil Univ Fed Sergipe Dept Comp DComp Sao Cristovao Sergipe Brazil

This paper presents a new code compression method where we merge the Huffman algorithm with the formation of patterns of blocks, which are found into the dictionary. We seek two consecutive blocks in two levels, one of them into compressed code and the other related to uncompressed code. We have used simulation with SimpleScalar and programs from MiBench. Our proposal has achieved a compression rate of 34.5% and 7% improvement in code compression when compared to the Huffman traditional method.

关键词： code compression Embedded Systems Huffman Dictionary-based Pattern Blocks MiBench

来源：评论

学校读者我要写书评

暂无评论

code compression for VLIW embedded processors

Code compression for VLIW embedded processors

引用

Conference on Embedded Processors for Multimedia and Communications

作者： Piccinelli, E Sannino, R STMicroelect Adv Syst Technol Agrate Brianza Italy

ISBN: (纸本)0819452122

The implementation of processors for embedded systems implies various issues: main constraints are cost, power dissipation and die area. On the other side, new terminals perform functions that require more computational flexibility and effort. Long code streams must be loaded into memories, which are expensive and power consuming, to run on DSPs or CPUs. To overcome this issue, the "Slimcode" proprietary algorithm presented in this paper (patent pending technology) can reduce the dimensions of the program memory. It can run offline and work directly on the binary code the compiler generates, by compressing it and creating a new binary file, about 40% smaller than the original one, to be loaded into the program memory of the processor. The decompression unit will be a small ASIC, placed between the Memory Controller and the System bus of the processor, keeping unchanged the internal CPU architecture: this implies that the methodology is completely transparent to the core. We present comparisons versus the state-of-the-art IBM codepack algorithm, along with its architectural implementation into the ST200 VLIW family core.

关键词： code compression embedded processors low power consumption VLIW

来源：评论

学校读者我要写书评

暂无评论

A class of code compression schemes for reducing power consumption in embedded microprocessor systems

引用

IEEE TRANSACTIONS ON COMPUTERS 2004年第4期53卷 467-482页

作者： Benini, L Menichelli, F Olivieri, M Univ Bologna DEIS Bologna Italy Univ Roma La Sapienza DIE I-00184 Rome Italy

compression of executable code in embedded microprocessor systems, used in the past mainly to reduce the memory footprint of embedded software, is gaining interest for the potential reduction in memory bus traffic and power consumption. We propose three new schemes for code compression, based on the concepts of static (using the static representation of the executable) and dynamic (using program execution traces) entropy and compare them with a state-of-the-art compression scheme, IBM's codePack. The proposed schemes are competitive with codePack for static footprint compression and achieve superior results for bus traffic and energy reduction. Another interesting outcome of our work is that static compression is not directly related to bus traffic reduction, yet there is a trade off between static compression and dynamic compression, i.e., traffic reduction.

关键词： microprocessor/microcomputer applications low-power design code compression

来源：评论

学校读者我要写书评

暂无评论

Studying the code compression design space - A synthesis approach

引用

JOURNAL OF SYSTEMS ARCHITECTURE 2014年第2期60卷 179-193页

作者： Menon, Sreejith K. Mathworks Natick MA 01760 USA

Embedded domain has witnessed the application of different code compression methodologies on different architectures to bridge the gap between ever-increasing application size and scarce memory resources. Selection of a code compression technique for a target architecture requires a detailed study and analysis of the code compression design space. There are multiple design parameters affecting the space, time, cost and power dimensions. Standard approaches of exploring the code compression design space are tedious, time consuming, and almost impractical with the increasing number of proposed compression algorithms. This is one of the biggest challenges faced by an architect trying to adopt a code compression methodology for a target architecture. We propose a novel synthesis based tool-chain for fast and effective exploration of the code compression design space and for evaluation of the tradeoffs. The tool-chain consists of a frontend framework that works with different compression/decompression schemes and a backend with high-level-synthesis, logic-synthesis, and power estimation tools to output the critical design parameters. We use the tool-chain to effectively analyze different code compression/decompression schemes of varying complexities. (C) 2013 Elsevier B.V. All rights reserved.

关键词： code compression High level synthesis Logic synthesis Power estimation Embedded systems

来源：评论

学校读者我要写书评

暂无评论

Dynamic code compression for JavaScript engine

引用

SOFTWARE-PRACTICE & EXPERIENCE 2023年第5期53卷 1196-1217页

作者： Park, Hyukwoo Kim, Seonghyun Bae, Boram Samsung Res Samsung Elect Seoul South Korea

Web applications created using web languages such as HTML, CSS, and JavaScript are widely used regardless of execution environments, owing to their portability and popularity. Since JavaScript language is conventionally used for complex computations in large-scale web apps, many optimization techniques have been proposed to accelerate the JavaScript performance. However, most of these optimizations speed up JavaScript engines at the expense of consuming more memory. Hence, memory consumption becomes an additional concern in the JavaScript field. Based on the research on memory status, we unearthed that a substantial portion of the heap memory is allocated for JavaScript source code, particularly in lightweight JavaScript engines, which may range from 13.2% to a maximal 52.5% of the entire heap. To resolve this memory issue, this article suggests a new memory optimization method, called dynamic code compression that dynamically compresses the source code and keeps its compressed form instead of the source string. A novel heuristic is proposed to timely compress the source code. We also re-design the internal structure of the JavaScript engine to efficiently compress the source code without incurring any conflict. Using our code compression method, we could reduce the entire heap memory by up to 43.3% and consistently downsize the overall heap size. From an evaluation of standard benchmarks, our approach showed just 2.7% degradation in performance with negligible compression overhead, proving the feasibility of the code compression technique.

关键词： code compression JavaScript memory optimization web engine

来源：评论

学校读者我要写书评

暂无评论

code compression in ARM Embedded Systems using Multiple Dictionaries

Code Compression in ARM Embedded Systems using Multiple Dict...

引用

15th IEEE International Conference on Computational Science and Engineering (CSE) / 10th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC)

作者： Azevedo Dias, Wanderson Roger Moreno, Edward David Fed Univ Amazonas UFAM Postgrad Program Informat PPGI Inst Comp IComp Manaus Amazonas Brazil Univ Fed Sergipe Ctr Exact Sci & Technol CCET Dept Comp Sci Aracaju Sergipe Brazil

ISBN: (纸本)9781467351652;9780769549149

This paper presents a new code compression method where we use different dictionaries, all of them are based in traditional Huffman algorithm. Our method reduces code size by up to 34.5% ( including all extra costs) and presents an improvement of almost 7% over the traditional Huffman method. We performed simulations using SimpleScalar and analyzes using the applications from benchmark MiBench and use the embedded processor ARM.

关键词： code compression Huffman embedded systems patterns blocks size dictionaries

来源：评论

学校读者我要写书评

暂无评论

Efficient code compression for Embedded Processors

引用

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 2008年第12期16卷 1696-1707页

作者： Bonny, Talal Henkel, Joerg Univ Karlsruhe CES D-76131 Karlsruhe Germany

code density is of increasing concern in embedded system design since it reduces the need for the scarce resource memory and also implicitly improves further important design parameters like power consumption and performance. In this paper we introduce a novel, hardware-supported approach. Besides the code, also the lookup tables (LUTs) are compressed, that can become significant in size if the application is large and/or high compression is desired. Our scheme optimizes the number and size of generated LUTs to improve the compression ratio. To show the efficiency of our approach, we apply it to two compression schemes: "dictionary-based" and "statistical". We achieve an average compression ratio of 48% (already including the overhead of the LUTs). Thereby, our scheme is orthogonal to approaches that take particularities of a certain instruction set architecture into account. We have conducted evaluations using a representative set of applications and have applied it to three major embedded processor architectures, namely ARM, MIPS, and PowerPC.

关键词： code compression code density embedded systems Huffman coding

来源：评论

学校读者我要写书评

暂无评论

Bitmask-based code compression methods for balancing power consumption and code size for hard real-time embedded systems

引用

MICROPROCESSORS AND MICROSYSTEMS 2012年第3期36卷 267-279页

作者： Chen, Po-Yueh Wu, Chao-Chin Jiang, Ying-Jie Natl Changhua Univ Educ Dept Comp Sci & Informat Engn Changhua Taiwan

In recent years, code compression has been frequently investigated for embedded systems to reduce memory use and power consumption. Among various compression schemes, dictionary-based ones are applied for their good compression ratios and rapid decompression engines. Bitmask-based code compression, which was derived from the dictionary-based ones, has been proven to have a superior compression ratio and rapid decompression engine. In this paper, we adopt the bitmask-based scheme and replace some of its dictionary entries to achieve greatly reduced power consumption while maintaining a competitive compression ratio. For a cacheless architecture, we propose three basic styles of replacement, namely by-access-saving, by-frequency, and by-block. Another procedure, called by-alignment, is applied afterward to further improve power consumption. According to the experimental results, the by-block scheme with the by-alignment procedure achieves the best result. In the best case, an increase of 1.61% in compression ratio can result in a 43.75% reduction in power consumption ratio. (C) 2012 Elsevier B.V. All rights reserved.

关键词： Embedded system code compression Power consumption

来源：评论

学校读者我要写书评

暂无评论

A New code compression Method for FOTA

引用

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 2010年第4期56卷 2350-2354页

作者： Wee, Youngcheul Kim, Taehwa Ajou Univ Div Informat & Comp Engn Suwon 443749 South Korea

This paper presents a new compression method for compressed Firmware-over-the-air (FOTA) that reconstructs a new compressed version from an old compressed version of firmware stored in NAND flash memory. The compressed FOTA requires a small delta that minimizes the amount of update data and an efficient compression method that provides fast encoding and decoding to achieve fast updating and extraction. A fast dictionary-based compression algorithm for the program code is introduced. With a high compression ratio, our method provides relatively fast encoding and very fast decoding. We demonstrate that the compression time during the update process can be reduced by utilizing the copy information stored in the delta without increasing the size of the delta. We present some experimental results to show the impact of this method in terms of the compression ratio, extraction time and updating time(1).

关键词： code compression NAND Delta FOTA

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：