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44th ACM/IEEE Design Automation Conference

作者： Xue, Liping Ozturk, Ozcan Kandemir, Mahmut Univ Delaware Newark DE 19716 USA Penn State Univ University Pk PA USA

ISBN: (纸本)9781595937711

While there have been considerable work in the last couple of years for architecting embedded chip multiprocessors, programming and compiler support required for them took relatively less attention. Our goal in this paper is to show that conventional compiler-directed code parallelization used in high performance computing is not very suitable for embedded chip multiprocessors where minimizing memory space requirements is an important issue. We propose and evaluate a novel memory-conscious loop parallelization strategy with the objective of minimizing the data memory requirements of processors. The proposed approach, which is formulated as a branch-and-bound problem, accomplishes its objective by being careful in selecting the loops to parallelize in a given loop nest.

关键词： code parallelization embedded CMP memory space optimization

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parallelization and analysis of selected numerical algorithms using OpenMP and Pluto on symmetric multiprocessing machine

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DATA TECHNOLOGIES AND APPLICATIONS 2019年第1期53卷 20-32页

作者： Sardar, Tanvir Habib Faizabadi, Ahmed Rimaz Jain Univ Sch Engn & Technol Bengaluru India PA Coll Engn Mangalore India

Purpose In recent years, there is a gradual shift from sequential computing to parallel computing. Nowadays, nearly all computers are of multicore processors. To exploit the available cores, parallel computing becomes necessary. It increases speed by processing huge amount of data in real time. The purpose of this paper is to parallelize a set of well-known programs using different techniques to determine best way to parallelize a program experimented. Design/methodology/approach A set of numeric algorithms are parallelized using hand parallelization using OpenMP and auto parallelization using Pluto tool. Findings The work discovers that few of the algorithms are well suited in auto parallelization using Pluto tool but many of the algorithms execute more efficiently using OpenMP hand parallelization. Originality/value The work provides an original work on parallelization using OpenMP programming paradigm and Pluto tool.

关键词： Algorithms OpenMP Auto parallelization code parallelization Hand parallelization Pluto

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Static Loop parallelization Decision Using Template Metaprogramming 16

Static Loop Parallelization Decision Using Template Metaprog...

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International Conference on High Performance Computing & Simulation (HPCS)

作者： Pereda, Alexis Hill, David R. C. Mazel, Claude Bachelet, Bruno Univ Clermont Auvergne CNRS LIMOS Clermont Ferrand France

ISBN: (纸本)9781538678794

This article proposes to use C++ template metaprogramming techniques to decide at compile-time which parts of a code sequence in a loop can be parallelized. The approach focuses on characterizing the way a variable is accessed in a loop (reading or writing), first to decide how the loop should be split to enable the analysis for parallelization on each part, and then to decide if the iterations inside each loop are independent so that they can be run in parallel. The conditions that enable the parallelization of a loop are first explained to justify the proposed decision algorithm exposed. Then, a C++ library-based solution is presented that uses expression templates to get the relevant information necessary for the parallelization decision of a loop, and metaprograms to decide whether to parallelize the loop and generate a parallel code.

关键词： code parallelization metaprogramming C plus plus expression templates parallelization decision

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Modeling parallelization Overheads for Predicting Performance

Modeling Parallelization Overheads for Predicting Performanc...

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International Conference on Information Systems Engineering (ICISE)

作者： Ranadive, Priti Vaidya, Vinay G. Symbiosis Int Univ Pune Maharashtra India KPIT Technol Ltd Pune Maharashtra India VMAS Consulting Pune Maharashtra India

ISBN: (纸本)9781509022878

Legacy codes primarily exist on a single core processor. With the proliferation of multicore processors, end users often want to migrate to new platforms to improve performance or reduce execution time of the application. Migration from a single core processor to multicore is an expensive proposition. Thus, end users often want to get some idea about possible performance benefit prior to actual migration. Parallelizing a given application often leads to overheads due to the very constructs that enable parallelization. These overheads reduce performance of the application. In this paper, we analyze the overheads caused by OpenMP parallelization constructs. We further provide guidelines to programmers on how to reduce these overheads and maximize the performance benefits of parallelization. We start our analysis by using motivational examples, create a model and then validate our model with benchmark codes. Our experiments show that the following factors affect overheads: 1) type and scope of arrays, 2) array access w.r.t. the overall data flow, 3) number of iterations, and 4) the chunk sizes during execution. Based on our experiments we propose a mathematical model for predicting the number of cycles for these overheads. We use this model to predict overheads of four benchmark codes. Our results show that the error between the number of cycles predicted and observed is on an average 8.22%

关键词： Multicore migration Overhead prediction Performance prediction code parallelization

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Automated Reasoning Support for Invasive Interactive parallelization

Automated Reasoning Support for Invasive Interactive Paralle...

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作者： Moshir Moghaddam, Kianosh Linköping University

学位级别：master

To parallelize a sequential source code, a parallelization strategy must be defined that transforms the sequential source code into an equivalent parallel version. Since parallelizing compilers can sometimes transform sequential loops and other well-structured codes into parallel ones automatically, we are interested in finding a solution to parallelize semi-automatically codes that compilers are not able to parallelize automatically, mostly because of weakness of classical data and control dependence analysis, in order to simplify the process of transforming the codes for *** Interactive parallelization (IIP) hypothesizes that by using anintelligent system that guides the user through an interactive process one can boost parallelization in the above direction. The intelligent system''s guidance relies on a classical code analysis and pre-defined parallelizing transformation sequences. To support its main hypothesis, IIP suggests to encode parallelizing transformation sequences in terms of IIP parallelization strategies that dictate default ways to parallelize various code patterns by using facts which have been obtained both from classical source code analysis and directly from the *** this project, we investigate how automated reasoning can supportthe IIP method in order to parallelize a sequential code with an acceptable performance but faster than manual parallelization. We have looked at two special problem areas: Divide and conquer algorithms and loops in the source codes. Our focus is on parallelizing four sequential legacy C programs such as: Quick sort, Merge sort, Jacobi method and Matrix multipliation and summation for both OpenMP and MPI environment by developing an interactive parallelizing assistance tool that provides users with the assistanceneeded for parallelizing a sequential source code

关键词： Multi-processors Dependence Analysis code parallelization Semi-automatic parallelization IIP ISC OpenMP MPI Artificial Intelligence Reasoning Decision Tree Divide and Conquer (D&C) algorithms Engineering and Technology Other Engineering and Technologies Other Engineering and Technologies not elsewhere specified Teknik och teknologier Annan teknik ?vrig annan teknik Technology teknik Master''s programme in Computer Science Master''s programme in Computer Science

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Extending Amdahl's Law for Multicores with Turbo Boost

IEEE COMPUTER ARCHITECTURE LETTERS

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IEEE COMPUTER ARCHITECTURE LETTERS 2017年第1期16卷 30-33页

作者： Verner, Uri Mendelson, Avi Schuster, Assaf Technion Dept Comp Sci Haifa Israel

Rewriting sequential programs to make use of multiple cores requires considerable effort. For many years, Amdahl's law has served as a guideline to assess the performance benefits of parallel programs over sequential ones, but recent advances in multicore design introduced variability in the performance of the cores and motivated the reexamination of the underlying model. This paper extends Amdahl's law for multicore processors with built-in dynamic frequency scaling mechanisms such as Intel's Turbo Boost. Using a model that captures performance dependencies between cores, we present tighter upper bounds for the speedup and reduction in energy consumption of a parallel program over a sequential one on a given multicore processor and validate them on Haswell and Sandy Bridge Intel CPUs. Previous studies have shown that from a processor design perspective, Turbo Boost mitigates the speedup limitations obtained under Amdahl's law by providing higher performance for the same energy budget. However, our new model and evaluation show that from a software development perspective, Turbo Boost aggravates these limitations by making parallelization of sequential codes less profitable.

关键词： Performance modeling multicore turbo boost code parallelization Amdahl's law

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iCetus: A Semi-automatic Parallel Programming Assistant 34th

iCetus: A Semi-automatic Parallel Programming Assistant

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34th International Workshop on Languages and Compilers for Parallel Computing (LCPC)

作者： Barakhshan, Parinaz Eigenmann, Rudolf Univ Delaware Newark DE 19716 USA

ISBN: (纸本)9783030993726;9783030993719

The iCetus tool is a new interactive parallelizer, providing users with a range of capabilities for the source-to-source transformation of C programs using OpenMP directives in shared memory machines. While the tool can parallelize code fully automatically for non-experts, power users can steer the parallelization process in a menu-driven way. iCetus which is still in its early stages of development is implemented as a web application for easy access, eliminating the need for user installation and updates. The tool supports the user through all phases of the program transformation process, including program analyses, parallelization, and optimization. The first phase includes both static and dynamic analyses, pointing out loops that represent performance bottlenecks and should be improved. The parallelization phase offers diverse options to cater to different levels of user skills. By displaying compiler analyses results in an interactive manner, iCetus supports the user in pinpointing parallelization impediments and resolving them. During the optimization phase, the programmer can apply successive improvements by editing the program, evaluating the performance, and comparing it to that obtained by previous program versions. iCetus also serves as a learning tool to help users understand important program patterns and their parallelization. In this way, it also helps train the user in writing code that likely yields better performance.

关键词： Interactive source-to-source compiler OpenMP parallel programming model Shared memory architecture code optimization code parallelization

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Lerna: Parallelizing Dependent Loops Using Speculation 18

Lerna: Parallelizing Dependent Loops Using Speculation

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11th ACM International Systems and Storage Conference (SYSTOR)

作者： Saad, Mohamed M. Palmieri, Roberto Ravindran, Binoy Alexandria Univ Alexandria Egypt Lehigh Univ Bethlehem PA 18015 USA Virginia Tech Blacksburg VA USA

ISBN: (纸本)9781450358491

We present Lerna, an end-to-end tool that automatically and transparently detects and extracts parallelism from data dependent sequential loops using speculation combined with a set of techniques including code profiling, dependency analysis, instrumentation, and adaptive execution. Speculation is needed to avoid conservative actions and detect actual conflicts. Lerna targets applications that are hard-to-parallelize due to data dependency. Our experimental study involves the parallelization of 13 applications with data dependencies. Results on a 24-core machine show an average of 2.7x speedup for micro-benchmarks and 2.5x for the macro-benchmarks.

关键词： code parallelization LLVM Transactions

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Static Loop parallelization Decision Using Template Metaprogramming

Static Loop Parallelization Decision Using Template Metaprog...

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International Conference on High Performance Computing and Simulation

作者： Alexis Pereda David R. C. Hill Claude Mazel Bruno Bachelet Universite Clermont Auvergne CNRS LIMOS

ISBN: (纸本)9781538678800

关键词： code parallelization Metaprogramming C++ expression templates parallelization decision

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Lerna: Parallelizing Dependent Loops Using Speculation

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ACM TRANSACTIONS ON STORAGE 2019年第1期15卷 6-6页

作者： Saad, Mohamed M. Palmieri, Roberto Ravindran, Binoy Alexandria Univ Alexandria 21526 Egypt Lehigh Univ Bethlehem PA 18015 USA Virginia Tech Blacksburg VA 24061 USA

We present Lerna, an end-to-end tool that automatically and transparently detects and extracts parallelism from data-dependent sequential loops. Lerna uses speculation combined with a set of techniques including code profiling, dependency analysis, instrumentation, and adaptive execution. Speculation is needed to avoid conservative actions and detect actual conflicts. Lerna targets applications that are hard-to-parallelize due to data dependency. Our experimental study involves the parallelization of 13 applications with data dependencies. Results on a 24-core machine show an average of 2.7x speedup for micro-benchmarks and 2.5x for the macro-benchmarks.

关键词： code parallelization LLVM transactions

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