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检索条件"主题词=combinational logic circuits"
80 条 记 录,以下是1-10 订阅
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combinational logic circuits with photonic devices
Combinational logic circuits with photonic devices
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6th Symposium on Optoelectronics (SIOEL'99)
作者: Schiopu, P Degeratu, V Degeratu, S Politehnica Univ Bucharest Bucharest Romania
In actual systems the optic signal are detected, processed and electronic recorded. These hybrid systems diminish considerably the processing speed of optical signals. So, it's absolute necessary to implement the ... 详细信息
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Graph-theoretic algorithm for finding maximal supergates in combinational logic circuits
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IEE PROCEEDINGS-circuits DEVICES AND SYSTEMS 1996年 第6期143卷 313-318页
作者: Min, HB Park, ES HANYANG UNIV DEPT ELECT ENGN ANSAN 425791 DYUNGGI DO SOUTH KOREA
Disjunctive decomposition of a large switching function into several smaller switching functions is an efficient way of solving many problems in logic design and testing areas. Finding disjunctive decomposition of an ... 详细信息
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Comparative study of serial and parallel heuristics used to design combinational logic circuits
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OPTIMIZATION METHODS & SOFTWARE 2007年 第3期22卷 485-509页
作者: Alba, Enrique Luque, Gabriel Coello Coello, Carlos A. Hernandez Lunat, Erika CINVESTAV IPN Evolut Computat Grp Secc Computac Dept Ing Elect Mexico City 07300 DF Mexico ETSI Informat Dept Lenguajes & Ciencias Computac Malaga 29071 Spain
In this article, we perform a comparative study of different heuristics used to design combinational logic circuits. This study mainly emphasizes the use of local search hybridized with a genetic algorithm (GA) and th... 详细信息
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An Empirical Model for Predicting SE Cross Section for combinational logic circuits in Advanced Technologies
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IEEE TRANSACTIONS ON NUCLEAR SCIENCE 2018年 第1期65卷 304-310页
作者: Jiang, H. Zhang, H. Kauppila, J. S. Massengill, L. W. Bhuva, B. L. Vanderbilt Univ Dept Elect Engn & Comp Sci 221 Kirkland Hall Nashville TN 37235 USA
At the gigahertz range of frequencies, contribution of combinational logic upsets has increased significantly to the overall single-event (SE) upset rate (SER) of sequential circuits. Most approaches for modeling and/... 详细信息
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Design of Memristor-Based combinational logic circuits
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circuits SYSTEMS AND SIGNAL PROCESSING 2021年 第12期40卷 5825-5846页
作者: Liu, Gongzhi Shen, Shuhang Jin, Peipei Wang, Guangyi Liang, Yan Hangzhou Dianzi Univ Inst Modern Circuits & Intelligent Informat Hangzhou 310018 Peoples R China
This paper proposes three modified memristor ratioed logic (MRL) gates: NOT, NOR and A AND (NOR B) (i.e., A center dot (B) over bar), each of which only needs 1 memristor and 1 NMOS. Based on the modified MRL gates, w... 详细信息
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MULTIPLE FAULT DETECTION FOR combinational logic circuits
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IEEE TRANSACTIONS ON COMPUTERS 1975年 第3期C 24卷 233-242页
作者: YAU, SS YANG, SC NORTHWESTERN UNIV BIOMED ENGN CTR EVANSTON IL 60201 USA NORTHWESTERN UNIV DEPT COMP SCI & ELECT ENGN EVANSTON IL 60201 USA
An algorithm for generating test sets to detect all the multiple stuck-at-faults in combinational logic circuits is presented. This algorithm generates a test set using a set of functions, called representative functi... 详细信息
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Delay abstraction in combinational logic circuits
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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED circuits AND SYSTEMS 1997年 第10期16卷 1205-1212页
作者: Kobayashi, N Malik, S NEC Corp Ltd C&C Media Res Labs Kawasaki Kanagawa 216 Japan Princeton Univ Dept Elect Engn Princeton NJ 08544 USA
In this paper we propose a data structure for abstracting the delay information of a combinatorial circuit. The particular abstraction that we are interested in is one that preserves the delays between all pairs of in... 详细信息
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TRANSITION COUNT TESTING OF combinational logic-circuits
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IEEE TRANSACTIONS ON COMPUTERS 1976年 第6期25卷 613-620页
作者: HAYES, JP UNIV SO CALIF DEPT ELECT ENGNLOS ANGELESCA 90007 UNIV SO CALIF SERV COMP SCILOS ANGELESCA 90007
logic circuits are usually tested by applying a sequence of input patterns S to the circuit under test and comparing the observed response sequence R bit by bit to the expected response Ro. The transition count (TC) o... 详细信息
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On Heuristics for Seeding the Initial Population of Cartesian Genetic Programming Applied to combinational logic circuits
On Heuristics for Seeding the Initial Population of Cartesia...
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Genetic and Evolutionary Computation Conference (GECCO)
作者: Manfrini, Francisco A. L. Bernardino, Heder S. Barbosa, Helio J. C. Univ Fed Juiz de Fora Juiz de Fora MG Brazil IFET Juiz De Fora MG Brazil LNCC Petropolis RJ Brazil
The design of circuits is an important research field and the corresponding optimization problems are complex and computationally expensive. Here, a Cartesian Genetic Programming (CGP) technique was used to design com... 详细信息
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Genetic Algorithm Based Design of combinational logic circuits using Reed Muller blocks
Genetic Algorithm Based Design of Combinational Logic Circui...
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World Congress on Engineering (WCE 2015)
作者: Vijayakumari, C. K. Mythili, P. James, Rekha K. Govt Engn Coll Rajiv Gandhi Inst Technol Dept Elect Engn Kottayam Kerala India Cochin Univ Sci & Technol Div Elect Kochi Kerala India
In this paper an approach based on an evolutionary algorithm to design combinational logic circuits with minimum number of Reed Muller units is suggested. Since replication of the same unit reduces the implementation ... 详细信息
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