In the paper we examine the use of non-classical truth values for dealing with computation errors in program specification and validation. In that context, 3-valued McCarthy logic is suitable for handling lazy sequent...
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The logarithmic number system (LNS) has found appeal in digital arithmetic because it allows multiplication and division to be performed much faster and more accurately than with widely-used floating-point (FP) number...
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The logarithmic number system (LNS) has found appeal in digital arithmetic because it allows multiplication and division to be performed much faster and more accurately than with widely-used floating-point (FP) number formats. We present a comprehensive review and comparison of various techniques and architectures for performing arithmetic operations efficiently in LNS, using the sign/logarithm format, and focus on the European Logarithmic Microprocessor (ELM), a device built in the framework of a research project launched in 1999, as an important case study. Comparison of the arithmetic performance of ELM with that of a commercial superscalar pipelined FP processor of the same vintage and technology confirms that LNS has the potential for successful deployment in general-purpose systems. Besides paying due attention to LNS attributes beyond computational speed and accuracy, novel contributions of this survey include an exploration of the relationship of LNS with the emerging field of approximate computing and a discussion of the discrete logarithmic number system.
Compensation methods are computationally simple methods of quickly finding changes to an existing nodal-voltage solution of a linear network when changes are made to the network topology or parameters [1]. This paper ...
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Compensation methods are computationally simple methods of quickly finding changes to an existing nodal-voltage solution of a linear network when changes are made to the network topology or parameters [1]. This paper investigates the efficient detection of ‘singular’ networks and computational instabilities, which can occur during a compensation process, in order to prevent physical maloperations and the propagation of computation errors. These singular networks include those which have no solution, multiple solutions or an island (totally disconnected subnetwork). Efficient methods are given for the detection and identification of an island, for continuing the compensation process both in the main network and in the island, and for reconnecting the main network to the island so that compensation methods can continue as usual for the reconnected network. Extensions of the method efficiently deal with the removal of a short circuit of a branch (opening a switch), for which case the standard method always fails because of the singularity of the nodal impedance matrix when there is a short circuit.
We study the behavior of the belief-propagation (BP) algorithm affected by erroneous data exchange in a wireless sensor network (WSN). The WSN conducts a distributed multidimensional hypothesis test over binary random...
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We study the behavior of the belief-propagation (BP) algorithm affected by erroneous data exchange in a wireless sensor network (WSN). The WSN conducts a distributed multidimensional hypothesis test over binary random variables. The joint statistical behavior of the sensor observations is modeled by a Markov random field whose parameters are used to build the BP messages exchanged between the sensing nodes. Through linearization of the BP message-update rule, we analyze the behavior of the resulting erroneous decision variables and derive closed-form relationships that describe the impact of stochastic errors on the performance of the BP algorithm. We then develop a decentralized distributed optimization framework to enhance the system performance by mitigating the impact of errors via a distributed linear data-fusion scheme. Finally, we compare the results of the proposed analysis with the existing works and visualize, via computer simulations, the performance gain obtained by the proposed optimization.
This paper presents a unified representation scheme for the implicit equations of points, lines, and circles. An associated set of geometric algorithms operates successfully on degenerate and nearly degenerate geometr...
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This paper presents a unified representation scheme for the implicit equations of points, lines, and circles. An associated set of geometric algorithms operates successfully on degenerate and nearly degenerate geometry, and when necessary produces degenerate geometric results. computation errors are interpreted geometrically in order to establish preconditions for reliable results and requirements on the resolution of computer arithmetic. The algorithms thus provide a basis for the wide range of geometric constructions required by computer-aided drafting and design systems.
Approximate Chinese-remainder-theorem decoding of residue numbers is a useful operation in residue arithmetic. The decoding yields an approximation to (X mod M)/M, in the range [0, 1), where X is the input number and ...
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Approximate Chinese-remainder-theorem decoding of residue numbers is a useful operation in residue arithmetic. The decoding yields an approximation to (X mod M)/M, in the range [0, 1), where X is the input number and M is the product of all moduli. We show the error distribution and worst-case errors for both the truncation and rounding versions of the approximate decoding procedure. We also prove that, contrary to some published accounts, limiting the dynamic range is ineffective in reducing the maximal error.
The article deals with the blurred image restoration obtained by rotating camera. The computation error analysis is provided and its influence to the quality of restored image is considered. The designed and implement...
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ISBN:
(纸本)9781450348843
The article deals with the blurred image restoration obtained by rotating camera. The computation error analysis is provided and its influence to the quality of restored image is considered. The designed and implemented algorithm of image restoration is described in this paper. The complexity of the algorithm is C*N. This algorithm slightly accumulating computational rounding error.
Decoders for Low Density Parity Check (LDPC) codes, used commonly in communication networks, possess inherent tolerance to random internal computation errors. Consequently, it is possible to apply voltage over-scaling...
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ISBN:
(纸本)9781450329750
Decoders for Low Density Parity Check (LDPC) codes, used commonly in communication networks, possess inherent tolerance to random internal computation errors. Consequently, it is possible to apply voltage over-scaling (VOS) in their implementation to save energy. In this paper, the impact of VOS on timing errors is characterized for a typical min sum LDPC decoder architecture using circuit simulations. Failure modes are analyzed for arithmetic circuits performing variable and check node computations. It is shown that a rather unconventional register placement in the variable node unit is beneficial for voltage scaling, and that the check node unit may be designed such that only the least significant bits are more likely to experience errors. Insights into timing error characteristics obtained through this analysis can be used to estimate the limits of voltage scaling and associated energy saving in practical LDPC decoder designs.
The logarithmic number system (LNS) has found appeal in digital arithmetic because it allows multiplication and division to be performed much faster and more accurately than with the widely used floating-point (FP) nu...
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ISBN:
(纸本)9781479923908
The logarithmic number system (LNS) has found appeal in digital arithmetic because it allows multiplication and division to be performed much faster and more accurately than with the widely used floating-point (FP) number formats. We review the sign/logarithmic number system and present a comparison of various techniques and architectures for performing arithmetic operations efficiently in LNS. As a case study, we describe the European logarithmic microprocessor, a device built in the framework of a research project launched in 1999. Comparison of the arithmetic performance of this microprocessor with that of a commercial superscalar pipelined FP processor leads to the conclusion that LNS can be successfully deployed in general-purpose systems.
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