检索结果-内蒙古大学图书馆

57th Asilomar Conference on Signals, Systems and Computers

作者： Yun, Sanggeon Barkam, Hamza Errahmouni Genssler, Paul R. Latapie, Hugo Amrouch, Hussam Imani, Mohsen Univ Calif Irvine Irvine CA 92697 USA Univ Stuttgart Stuttgart Germany CISCO Syst San Jose CA USA Munich Inst Robot & Machine Intelligence Munich Germany Tech Univ Munich Munich Germany

ISBN: (纸本)9798350325744

Clustering has emerged as a critical tool in diverse fields. Nevertheless, its high computational cost has been a persistent challenge, particularly for large-scale datasets. To address this, various compute-in-memory (CiM) approaches have been proposed, including the use of Ferroelectric FET (FeFET) technology due to its ultra-efficient and compact CiM architecture. However, non-idealities resulting from cell thickness and device temperature have impeded the scaling of FeFETs and thus hindered their potential to be used for clustering. In light of this, we propose a Hyper-Dimensional computing (HDC) framework specifically for FeFET technology in the context of clustering. Our approach involves a cross-layer FeFET reliability model that captures the effects of scaling on multi-bit FeFETs, taking into account the impact of process variation and inherent stochasticity. We use two models in our HDC framework, a full-precision, ideal model for training, and a quantized error-impacted version for validation and inference. This iterative adaptation strategy helps to overcome the challenges associated with the non-idealities of FeFET technology. Our results demonstrate the proposed HDC framework performs better than traditional algorithms such as k-means and BIRCH. Moreover, our model can function as its ideal counterpart without noise, proving its potential to scale FeFET technology for clustering applications.

关键词： clustering data science computing in memory FeFET hyperdimensional computing

来源：评论

学校读者我要写书评

暂无评论

The trend of emerging non-volatile TCAM for parallel search and AI applications

引用

Chip 2022年第2期1卷 16-26页

作者： Ke-Ji Zhou Chen Mu Bo Wen Xu-Meng Zhang Guang-Jian Wu Can Li Hao Jiang Xiao-Yong Xue Shang Tang Chi-Xiao Chen Qi Liu Frontier Institute of Chip and System Fudan UniversityShanghai 200438China Shanghai Qi Zhi Institute Shanghai 200232China Frontier Institute of Chip and System Fudan UniversityShanghai 201203China Department of Electrical and Electronic Engineering The University of Hong KongHong Kong 999077China State Key Laboratory of ASIC and System Fudan UniversityShanghai 201203China BirenTech Research Shanghai 201114China

In this paper, we review the recent trends in parallel search and artificial intelligence (AI) applications using emerging non-volatile ternary content addressable memory (TCAM). Firstly, the principle and development of four typical emerging memory used to implement the non-volatile TCAM are discussed. Then, we analyze the principle and challenges of SRAM-based TCAM and non-volatile TCAM for the parallel search. Finally, the research trends and challenges of non-volatile TCAM used for AI application are presented, which include computer-science oriented and neuroscience oriented computing.

关键词： Artificial Intelligence(AI) Non-volatile memory Ternary content addressable memory(TCAM) computing in memory Neuromor-phic computing

来源：评论

学校读者我要写书评

暂无评论

A Fully-Integrated Memristor Chip for Edge Learning

引用

Nano-Micro Letters 2024年第9期16卷 123-127页

作者： Yanhong Zhang Liang Chu Wenjun Li School of Electronics and Information Hangzhou Dianzi UniversityHangzhou 310018People’s Republic of China

It is still challenging to fully integrate computing in memory chip as edge learning *** recent work published on Science,a fully-integrated chip based on neuromorphic memristors was developed for edge learning as artificial neural networks with functionality of synapses,dendrites,and somas.A crossbar-array memristor chip facilitated edge learning including hardware realization,learning algorithm,and cycle-parallel sign-and threshold-based learning(STELLAR)*** motion control and demonstration platforms were executed to improve the edge learning ability for adapting to new scenarios.

关键词： computing in memory Edge learning Fully-integrated chip

来源：评论

学校读者我要写书评

暂无评论

AI: From Deep Learning to In-memory computing 33

AI: From Deep Learning to In-Memory Computing

引用

Conference on Metrology, Inspection, and Process Control for Microlithography XXXIII

作者： Lung, Hsiang-Lan Macronix 680 North McCarthy BlvdSuite 200 Milpitas CA 95035 USA

ISBN: (数字)9781510625662

ISBN: (纸本)9781510625662

In the past few years, Artificial Intelligence (AI) has been a subject of intense media hype. Machine learning, deep learning (DL), and AI come up in countless articles, often outside of technology-minded publications. As the AI hype keeps growing, it is important to be able to recognize the signal in the noise, to tell apart world-changing developments from what are merely over-hyped press releases. This paper tries to explain how deep learning is working and how GPU (Graphic Processing Unite) can make it a reality. Finally, in-memory computing (IMC) for DL is introduced to point out future high performance and low power DL hardware development direction.

关键词： AI machine learning deep learning artificial neuron network ANN convolution neuron network CNN in-memory computing computing in memory

来源：评论

学校读者我要写书评

暂无评论

Improving model robustness to weight noise via consistency regularization

引用

MACHINE LEARNING-SCIENCE AND TECHNOLOGY 2024年第3期5卷 035065页

作者： Hou, Yaoqi Zhang, Qingtian Wang, Namin Wu, Huaqiang Beijing Adv Innovat Ctr Integrated Circuits Beijing Peoples R China Tsinghua Univ Sch Integrated Circuits Beijing Peoples R China

As an emerging computing architecture, the computing-in-memory (CIM) exhibits significant potential for energy efficiency and computing power in artificial intelligence applications. However, the intrinsic non-idealities of CIM devices, manifesting as random interference on the weights of neural network, may significantly impact the inference accuracy. In this paper, we propose a novel training algorithm designed to mitigate the impact of weight noise. The algorithm strategically minimizes cross-entropy loss while concurrently refining the feature representations in intermediate layers to emulate those of an ideal, noise-free network. This dual-objective approach not only preserves the accuracy of the neural network but also enhances its robustness against noise-induced degradation. Empirical validation across several benchmark datasets confirms that our algorithm sets a new benchmark for accuracy in CIM-enabled neural network applications. Compared to the most commonly used forward noise training methods, our approach yields approximately a 2% accuracy boost on the ResNet32 model with the CIFAR-10 dataset and a weight noise scale of 0.2, and achieves a minimum performance gain of 1% on ResNet18 with the ImageNet dataset under the same noise quantization conditions.

关键词： computing in memory parameter perturbation weight noise dual-objective optimization

来源：评论

学校读者我要写书评

暂无评论

A Booth-based Digital Compute-In-memory Marco for Processing Transformer Model

A Booth-based Digital Compute-In-Memory Marco for Processing...

引用

IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

作者： Feng, Zhongyuan Wang, Bo Zhang, Zhaoyang Guo, An Si, Xin Southeast Univ Sch Microelect Nanjing Peoples R China

ISBN: (纸本)9781665450737

Transformer model has achieved excellent results in many fields, owing of its huge data volume and high precision requirements, the traditional analog compute-in-memory circuit can no longer meet its needs. To solve this dilemma, this paper proposes a digital compute-in-memory circuit based on the improved Booth algorithm. The 6T SRAM array stores the multiplicand, and the multiplier is encoded by the booth encoder, and then, local computing cell (LCC) read the corresponding value from the array according to the encoding result. These values are finally sent to the dual- mode shift and add module (DMSA) to obtain the computation results. The proposed circuit achieved energy efficiency of 33.11TOPS/W@INT8 and 8.3 TOPS/W@INT16. And the proposed circuit achieved 1.92+ better energy efficiency compared with previous works.

关键词： Transformer model computing in memory Booth Algorithm 6T SRAM Digital Computation

来源：评论

学校读者我要写书评

暂无评论

Multi-Function CIM Array for Genome Alignment Applications built with Fully Digital Flow 8

Multi-Function CIM Array for Genome Alignment Applications b...

引用

8th IEEE Nordic Circuits and Systems Conference (NorCAS)

作者： Lanius, Christian Gemmeke, Tobias Rhein Westfal TH Aachen Chair Integrated Digital Syst & Circuit Design Aachen Germany

ISBN: (数字)9798350345506

ISBN: (纸本)9798350345506

With the advent of next generation genome sequencing machines, the number of genomic reads has increased in the last few years. The assembly and alignment of the reads to reference genomes is computationally complex: Optimal solutions obtained by solving the approximate string matching problem are computationally infeasible when reference genomes are in the order of 3 billion bases. Modern alignment algorithms perform a preprocessing step, where likely matching regions are computed efficiently and only in that region, a base level alignment is performed. In this paper, we show how sorting and searching in memories can be accelerated, which are key steps in common genome alignment algorithms. We develop a CIM (compute in memory) array out of standard-cells, which is capable of sorting a stream of data, as well as act as a CAM (content addressable memory) and perform multi-word logic operations. We fabricated the 2.6 mu m(2)/bit design in a 22nm FDSOI technology, achieving up to 4.28 GB/s throughput and 4.97 nJ/sort at the minimum energy point as a sorter.

关键词： computing in memory sorting genome alignment

来源：评论

学校读者我要写书评

暂无评论

Testing and Reliability of computing-In Memories: Solutions and Challenges 6

Testing and Reliability of Computing-In Memories: Solutions ...

引用

6th IEEE International Test Conference in Asia (ITC-Asia)

作者： Li, Jin-Fu Natl Cent Univ Dept Elect Engn Adv Reliable Syst ARES Lab Taoyuan 320 Taiwan

ISBN: (数字)9781665455237

ISBN: (纸本)9781665455237

Various computing-in-memory designs have been proposed as a possible computing architecture for the datacentric computing applications. Existing memories such as random access memories, flash memories, and emerging memories can be modified as computing-in-memories (CIMs) to support computing operations. In CIMs, computing operations typically are more complex and have smaller sensing margin than the read operation. Furthermore, storage devices of emerging memories are more unreliable than transistors. Those make the testing and reliability of CIMs become worse. In this paper, we first review existing testing and reliability-enhancement methods for CIMs. Then, testing and reliability challenges of CIMs are discussed.

关键词： computing in memory RAM RRAM STTMRAM test reliability

来源：评论

学校读者我要写书评

暂无评论

HfO2-based Ferroelectric Devices for Low Power Applications 6

HfO2-based Ferroelectric Devices for Low Power Applications

引用

6th IEEE Electron Devices Technology and Manufacturing Conference (EDTM)

作者： Huang, Qianqian Yang, Mengxuan Luo, Jin Su, Chang Huang, Ru Peking Univ Sch Integrated Circuits Key Lab Microelect Devices & Circuits MOE Beijing 100871 Peoples R China Peking Univ Beijing Lab Future IC Technol & Sci Beijing 100871 Peoples R China

ISBN: (纸本)9781665421782

HfO2-based ferroelectric devices have attracted extensive attention for diverse applications due to its fully CMOS compatibility and highly scalability. For low-power logic applications, we experimentally observed the negative capacitance (NC) effect in HfO2-based ferroelectric film and systematically studied its fundamental physics from the perspective of dynamic NC theory. Moreover, by exploiting the inherent physics of ferroelectric polarization switching, we present that ferroelectric devices can be utilized for the hardware implementation of neuro-inspired computing, providing ultralow hardware-cost and high energy-efficient solutions for artificial intelligence.

关键词： Ferroelectric negative capacitance neuromorphic computing computing in memory

来源：评论

学校读者我要写书评

暂无评论

A Study on the Channel Holes' Diameter Effects of High-Performance Vertical-Channel Flash memory Cells

引用

ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY 2024年第10期13卷

作者： Yan, Zijin Zhu, Huilong Yang, Hong Li, Junjie Lu, Shunshun Zhang, Chenchen Yang, Shuai Bai, Tianyu Zhao, Kaiqiang Xiang, Liang Zhang, Yongkui Li, Junfeng Luo, Jun Ye, T. C. Chinese Acad Sci Inst Microelect Integrated Circuit Adv Proc R&D Ctr Beijing 100029 Peoples R China Univ Chinese Acad Sci Beijing 100049 Peoples R China

High-performance vertical-channel flash (HVF) memory cells were fabricated on the single crystalline Si (c-Si) sidewalls of the cylindrical deep wells in c-Si substrate. To investigate the diameter effects of the cylindrical deep wells, namely channel holes, on HVF cells, the channel holes with different diameters, ranging from 65 nm to 260 nm, were made. memory gate stacks of SiO2/Al2O3/HfO2/Al2O3/TiN/W were formed by ozone oxidation and then ALD with the deposition thicknesses of 1/5/7/8/2/150 nm, respectively. For the devices with their diameters equal to or greater than 150 nm, their electrical properties, such as Vt, SS, DIBL, and program/erase characteristics, are close. As expected, DIBL and SS become better as the diameter increasing due to better gate control with larger diameter. However, large changes were occurred for the devices with the diameters of 90 nm and 65 nm. A simple model based on cylinder bulk for vertical flash memory devices was presented to obtain an approximate analytical solution for depletion-width and explain our experimental data. For the devices with the diameters of 150 nm, the high On/Off current ratio of 107 and relatively large memory window of 4.5 V were achieved. However, programming/erasing efficiency were degraded with hole diameter decreasing.

关键词： 3D memory three-dimensional stacking NOR flash computing in memory diameter effect

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：