For the wearable biomedical signal detection, both high accuracy and low-power consumption are critical requirements. Various works have employed the neural network to improve the detecting accuracy and develop the bi...
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For the wearable biomedical signal detection, both high accuracy and low-power consumption are critical requirements. Various works have employed the neural network to improve the detecting accuracy and develop the biomedical processor. However, the biomedical processor with neural network engine contains massive data movements and large data buffers. One solution is the computing-in memory (CIM) architecture, which locates more data near the computing engine to reduce data movements. In traditional CIM-based solution, the detecting accuracy and power consumption is difficult to be optimized simultaneously, where the accuracy should be satisfied for the detection. To date, the time-domain computing engine have been developed to employ both digital and time domain computation. In this work, we present a high-precision time-domain engine to perform 8-bit multiplication and addition operation for the biomedical signal detection. With the high precision time-domain engine, we develop a CIM-based neural-network processor, namely TDPRO, to perform the detection of arrhythmia. In addition, we develop TD-zero-jumping (TDJ) and idle-shutdown (ISD) techniques according to signal features and data mapping strategy, further optimizing the power consumption. Based on our evaluation, the TD-based 8-bit mulitply-accumulation operation is robust, without declining the accuracy of biomedical signal detection. We design a ECG processor with the proposed TDPRO architecture, which obtains 98.60% high accuracy and 75.7% power saving compared to the recent the state-of-the-art study.
computing-in-memory architecture is one good candidate for overcoming the memory-wall bottleneck of von Neumann computing architecture. Many approaches were proposed to modify different types of memories to support th...
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ISBN:
(纸本)9781665459716
computing-in-memory architecture is one good candidate for overcoming the memory-wall bottleneck of von Neumann computing architecture. Many approaches were proposed to modify different types of memories to support the computing function. This paper provides a brief tutorial on computing-in memory (CIM) designs and test techniques. Also, some challenges of CIM design and testing are discussed.
Resistive random access memory (RRAM) is one promising nonvolatile memory. It also is a good candidate for realizing computing-in memories. In this paper, we perform fault modeling for 1T1R RRAM-based computing-in mem...
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ISBN:
(数字)9781665455237
ISBN:
(纸本)9781665455237
Resistive random access memory (RRAM) is one promising nonvolatile memory. It also is a good candidate for realizing computing-in memories. In this paper, we perform fault modeling for 1T1R RRAM-based computing-in memories (CIMs). Although there are existing works reported fault modeling and testing for RRAMs and RRAM-based CIMs, they do the fault analysis based on bit-oriented array organization. Here we inject intra-cell and inter-cell electrical defects in a wordoriented cell array for the fault analysis. Fault analysis results show that a RRAM-based CIM may have computing faults and data dependent faults in addition to conventional RRAM faults. We also propose a march test March-R11N for the 1T1R RRAMbased CIMs. Analysis results show that March-R11N requires 11N test complexity to cover all the typical faults and defined faults of a 1T1R RRAM-based CIM with N words.
Processing unit and memory are key components for artificial intelligent (AI) processor, which are developed by the CMOS technology and static random access memory (SRAM), respectively. As technology scaling down to s...
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ISBN:
(纸本)9781665401746
Processing unit and memory are key components for artificial intelligent (AI) processor, which are developed by the CMOS technology and static random access memory (SRAM), respectively. As technology scaling down to sub-30 nm, the leakage current has become a critical issue to AI processor. Recently, the emerging non-volatile memory is mature gradually, such as Magnetic RAM (MRAM) and Resistive RAM (RRAM), which can be used to develop AI processor to alternate both processing unit and memory. In this work, we provide a survey on the recent tape-out work on MRAM and RRAM. We discuss the trend of MRAM and RRAM as buffer/Cache, and computing in memory architecture. Based on the recent developments, we predict both MRAM and RRAM can be a AI product soon.
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