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Scout: a data-parallel programming language for graphics processors

parallel COMPUTING 2007年第10-11期33卷 648-662页

作者： McCormick, Patrick Inman, Jeff Ahrens, James Mohd-Yusof, Jamaludin Roth, Greg Cummins, Sharen Los Alamos Natl Lab Comp Computat & Stat Sci Div Los Alamos NM 87545 USA Univ Utah Dept Comp Sci Salt Lake City UT 84112 USA

Commodity graphics hardware has seen incredible growth in terms of performance, programmability, and arithmetic precision. Even though these trends have been primarily driven by the entertainment industry, the price-to-performance ratio of graphics processors (GPUs) has attracted the attention of many within the high-performance computing community. While the performance of the GPU is well suited for computational science, the programming interface, and several hardware limitations, have prevented their wide adoption. In this paper we present Scout, a data-parallel programming language for graphics processors that hides the nuances of both the underlying hardware and supporting graphics software layers. In addition to general-purpose programming constructs, the language provides extensions for scientific visualization operations that support the exploration of existing or computed data sets. Published by Elsevier B.V.

关键词： graphics processors data-parallel programming heterogeneous computing visualization

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A parallel programming ENVIRONMENT SUPPORTING MULTIPLE data-parallel MODULES

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INTERNATIONAL JOURNAL OF parallel programming 1992年第5期21卷 363-386页

作者： SEEVERS, BK QUINN, MJ HATCHER, PJ OREGON STATE UNIV DEPT COMP SCICORVALLISOR 97331 UNIV NEW HAMPSHIRE DEPT COMP SCIDURHAMNH 03824

We describe a system that allows programmers to take advantage of both control and data parallelism through multiple intercommunicating data-parallel modules. This programming environment extends C-type stream 1/0 to include intermodule communication channels. The programmer writes each module as a separate data-parallel program, then develops a channel linker specification describing how to connect the modules together. A channel linker we have developed loads the separate modules on to the parallel machine and binds the communication channels together as specified. We present performance data that demonstrates a mixed control- and data-parallel solution can yield better performance than a strictly data-parallel solution. The system described currently runs on the Intel iWarp multicomputer.

关键词： COMMUNICATION CHANNELS CONTROL-parallel programming data-parallel programming dataparallel-C INTEL IWARP

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A flexible processor mapping technique toward data localization for block-cyclic data redistribution

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JOURNAL OF SUPERCOMPUTING 2008年第2期45卷 151-172页

作者： Huang, Jih-Woei Chu, Chih-Ping Natl Cheng Kung Univ Dept Comp Sci & Informat Engn Tainan 701 Taiwan

Array redistribution is usually needed for more efficiently executing a data-parallel program on distributed memory multicomputers. To minimize the redistribution data transfer cost, processor mapping techniques were proposed to reduce the amount of redistributed data elements. Theses techniques demand that the beginning data elements on a processor not be redistributed in the redistribution. On the other hand, for satisfying practical computation needs, a programmer may require other data elements to be un-redistributed (localized) in the redistribution. In this paper, we propose a flexible processor mapping technique for the Block-Cyclic redistribution to allow the programmer to localize the required data elements in the redistribution. We also present an efficient redistribution method for the redistribution employing our proposed technique. The data transfer cost reduction and system performance improvement for the redistributions with data localization are analyzed and presented in our experimental results.

关键词： data-parallel programming distributed memory multicomputers HPF data distribution processor mapping MPI

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Efficient local memory sequence generation for data parallel programs using permutations

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JOURNAL OF SYSTEMS ARCHITECTURE 2001年第6期47卷 505-515页

作者： Huang, TC Shiu, LC Huang, JH Natl Sun Yat Sen Univ Dept Elect Engn Kaohsiung 804 Taiwan

Generating local memory access sequence is a critical issue in distributed-memory implementations of data-parallel languages. In this paper, for arrays distributed block-cyclically on multiple processors, we introduce a novel approach to the local memory access sequence generation using the theory of permutation. By compressing the active elements in a block into an integer, called compress number, and exploiting the fact that there is a repeating pattern in the access sequence, we obtain the global block cycle, Then, we show that the local block cycle can be efficiently enumerated as closed forms using the permutation of global block cycle. After decompressing the compress number in the local block cycle, the local block patterns are restored and the local memory access sequence can be quickly generated. Unlike other works, our approach incurs no run-time overhead. (C) 2001 Elsevier Science B.V. All rights reserved.

关键词： block-cyclic distribution local memory access sequence data-parallel programming block compression/decompression permutation

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Processor mapping techniques toward efficient data redistribution

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IEEE TRANSACTIONS ON parallel AND DISTRIBUTED SYSTEMS 1995年第12期6卷 1234-1247页

作者： Kalns, ET Ni, LM MICHIGAN STATE UNIV DEPT COMP SCIE LANSINGMI 48824

Run-time data redistribution can enhance algorithm performance in distributed-memory machines, Explicit redistribution of data can be performed between algorithm phases when a different data decomposition is expected to deliver increased performance for a subsequent phase of computation. Redistribution, however, represents increased program overhead as algorithm computation is discontinued while data are exchanged among processor memories, In this paper, we present a technique that minimizes the amount of data exchange for BLOCK to CY-CLIC (c) (or vice-versa) redistributions of arbitrary number of dimensions, Preserving the semantics of the target (destination) distribution pattern, the technique manipulates the data to logical processor mapping of the target pattern, When implemented on an IBM SP, the mapping technique demonstrates redistribution performance improvements of approximately 40% over traditional data to processor mapping. Relative to the traditional mapping technique, the proposed method affords greater flexibility in specifying precisely which data elements are redistributed and which elements remain on-processor.

关键词： distributed-memory architectures data decomposition data redistribution High Performance Fortran processor mapping data-parallel programming

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hiCUDA: High-Level GPGPU programming

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IEEE TRANSACTIONS ON parallel AND DISTRIBUTED SYSTEMS 2011年第1期22卷 78-90页

作者： Han, Tianyi David Abdelrahman, Tarek S. Univ Toronto Edward S Rogers Sr Dept Elect & Comp Engn Toronto ON M5S 3G4 Canada

Graphics Processing Units (GPUs) have become a competitive accelerator for applications outside the graphics domain, mainly driven by the improvements in GPU programmability. Although the Compute Unified Device Architecture ( CUDA) is a simple C-like interface for programming NVIDIA GPUs, porting applications to CUDA remains a challenge to average programmers. In particular, CUDA places on the programmer the burden of packaging GPU code in separate functions, of explicitly managing data transfer between the host and GPU memories, and of manually optimizing the utilization of the GPU memory. Practical experience shows that the programmer needs to make significant code changes, often tedious and error-prone, before getting an optimized program. We have designed hiCUDA, a high-level directive-based language for CUDA programming. It allows programmers to perform these tedious tasks in a simpler manner and directly to the sequential code, thus speeding up the porting process. In this paper, we describe the hiCUDA directives as well as the design and implementation of a prototype compiler that translates a hiCUDA program to a CUDA program. Our compiler is able to support real-world applications that span multiple procedures and use dynamically allocated arrays. Experiments using nine CUDA benchmarks show that the simplicity hiCUDA provides comes at no expense to performance.

关键词： CUDA GPGPU data-parallel programming directive-based language source-to-source compiler

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A COMPARATIVE-STUDY OF THE USE OF THE data-parallel APPROACH FOR COMPRESSIBLE FLOW CALCULATIONS

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parallel COMPUTING 1994年第3期20卷 363-373页

作者： SAWLEY, ML BERGMAN, CM KUNGLIGA TEKNISKA HOGSKOLAN CTR COMPUTAT MATH & MECHS-10044 STOCKHOLMSWEDEN

The results are presented of an investigation into the use of the data-parallel programming approach on four different massively-parallel computers: the MasPar MP-1 and MP-2 and the Thinking Machines CM-200 and CM-5. A code to calculate inviscid compressible flow, originally written in FORTRAN 77 for a traditional vector computer, has been re-written entirely in Fortran 90 to take advantage of the compilers available on the massively-parallel computers. It is shown that the discretization of the governing equations on a regular mesh is well adapted to data parallelism. For a typical test problem of supersonic flow through a ramped duct, computational speeds have been achieved using these massively-parallel computers that are superior to those obtained using a single processor of a Cray Y-MP. In addition, this study has enabled the question of code portability between the different computers to be assessed.

关键词： COMPUTATIONAL FLUID DYNAMICS EULER EQUATIONS data-parallel programming PORTABILITY PERFORMANCE RESULTS

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An efficient communication scheduling method for the processor mapping technique applied data redistribution

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JOURNAL OF SUPERCOMPUTING 2006年第3期37卷 297-318页

作者： Huang, Jih-Woei Chu, Chih-Ping Natl Cheng Kung Univ Dept Comp Sci & Informat Engn Tainan 701 Taiwan

Array redistribution is usually required for more efficiently executing a data-parallel program on distributed memory multi-computers. In performing array redistribution using synchronous communication mode, data communications among the processors should be properly arranged to avoid incurring higher data transfer cost. Some efficient communication scheduling methods for the Block-Cyclic redistribution have been proposed. On the other hand, the processor mapping technique can help reduce the data transfer cost of redistribution. To avoid degrading the benefit of data transfer cost reduction, it is needed to construct optimal communication schedules for the redistribution in which the processor mapping technique is applied. In this paper, we present a unified approach to constructing optimal communication schedules for the processor mapping technique applied Block-Cyclic redistribution. The proposed method is founded on the processor mapping technique and can more efficiently construct the required communication schedules than other optimal scheduling methods.

关键词： parallel compiler data-parallel programming data redistribution communication scheduling processor mapping MPI

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Debugging real-world data-parallel programs with SPiDER

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FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE 2002年第6期18卷 779-788页

作者： Fahringer, T Sowa-Pieklo, K Univ Vienna Inst Software Sci A-1090 Vienna Austria ABB Corp Res PL-31038 Krakow Poland

Debuggers are crucial to understand the global execution behavior and intricate details of a program, to control the state of many processes, to present distributed information in a concise and clear way, to observe the execution behavior, and to detect and locate programming errors. In this paper we describe the design and implementation of SPiDER which is an interactive source-level debugging system for both regular and irregular High Performance Fortran programs. SPiDER combines a base debugging system for message-passing programs with a high-level debugger that interfaces with an HPF compiler. SPiDER, in addition to conventional debugging functionality, allows a single process of a parallel program to be expected or the entire program to be examined from a global point of view. A sophisticated visualization system has been developed and included in SPiDER to visualize data distributions, data to processor mapping relationships, and array values. SPiDER enables a programmer to dynamically change data distributions as well as array values. For arrays whose distribution can change during program execution, an animated replay displays the distribution sequence together with the associated source code location. Array values can be stored at individual execution points and compared against each other to examine execution behavior (e.g. convergence behavior of a numerical algorithm). Finally, SPiDER also offers limited support to evaluate the performance of parallel programs through a graphical load diagram. SPiDER has been fully implemented and is currently being used for the development of various real-world applications. Several experiments are presented that demonstrate the usefulness of SPiDER. (C) 2002 Published by Elsevier Science B.V.

关键词： symbolic debugger data-parallel programming HPF

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FlumeJava: Easy, Efficient data-parallel Pipelines 10

FlumeJava: Easy, Efficient Data-Parallel Pipelines

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ACM SIGPLAN Conference on programming Language Design and Implementation

作者： Chambers, Craig Raniwala, Ashish Perry, Frances Adams, Stephen Henry, Robert R. Bradshaw, Robert Weizenbaum, Nathan Google Seattle WA USA

ISBN: (纸本)9781450300193

MapReduce and similar systems significantly ease the task of writing data-parallel code. However, many real-world computations require a pipeline of Map Reduces, and programming and managing such pipelines can be difficult. We present Flume Java, a Java library that makes it easy to develop, test, and run efficient data-parallel pipelines. At the core of the Flume Java library are a couple of classes that represent immutable parallel collections, each supporting a modest number of operations for processing them in parallel. parallel collections and their operations present a simple, high-level, uniform abstraction over different data representations and execution strategies. To enable parallel operations to run efficiently, Flume Java defers their evaluation, instead internally constructing an execution plan dataflow graph. When the final results of the parallel operations are eventually needed, Flume Java first optimizes the execution plan, and then executes the optimized operations on appropriate underlying primitives (e.g., Map Reduces). The combination of high-level abstractions for parallel data and computation, deferred evaluation and optimization, and efficient parallel primitives yields an easy-to-use system that approaches the efficiency of hand-optimized pipelines. Flume Java is in active use by hundreds of pipeline developers within Google.

关键词： data-parallel programming MapReduce Java

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