咨询与建议

限定检索结果

文献类型

  • 115 篇 会议
  • 105 篇 期刊文献
  • 1 篇 学位论文

馆藏范围

  • 221 篇 电子文献
  • 0 种 纸本馆藏

日期分布

学科分类号

  • 213 篇 工学
    • 169 篇 电气工程
    • 105 篇 计算机科学与技术...
    • 37 篇 电子科学与技术(可...
    • 36 篇 信息与通信工程
    • 13 篇 控制科学与工程
    • 12 篇 材料科学与工程(可...
    • 12 篇 软件工程
    • 4 篇 仪器科学与技术
    • 3 篇 机械工程
    • 3 篇 生物医学工程(可授...
    • 1 篇 力学(可授工学、理...
    • 1 篇 测绘科学与技术
  • 14 篇 医学
    • 14 篇 临床医学
  • 13 篇 理学
    • 10 篇 物理学
    • 3 篇 生物学
    • 1 篇 数学
    • 1 篇 化学
    • 1 篇 统计学(可授理学、...
  • 9 篇 管理学
    • 8 篇 管理科学与工程(可...
    • 1 篇 图书情报与档案管...

主题

  • 221 篇 distributed arit...
  • 41 篇 fpga
  • 22 篇 fir filter
  • 20 篇 vlsi
  • 9 篇 discrete wavelet...
  • 9 篇 field programmab...
  • 8 篇 lut
  • 8 篇 digital filter
  • 8 篇 dsp
  • 7 篇 discrete cosine ...
  • 7 篇 inner product
  • 6 篇 dwt
  • 6 篇 dct
  • 6 篇 fir
  • 5 篇 low power
  • 5 篇 convolution
  • 5 篇 digital filters
  • 5 篇 approximate comp...
  • 5 篇 adaptive filter
  • 5 篇 digital signal p...

机构

  • 5 篇 nanyang technol ...
  • 3 篇 vit univ sch ele...
  • 3 篇 iwate univ fac e...
  • 3 篇 univ louisiana l...
  • 2 篇 warsaw univ tech...
  • 2 篇 department of el...
  • 2 篇 northeastern uni...
  • 2 篇 indian inst engn...
  • 2 篇 georgia inst tec...
  • 2 篇 inst infocomm re...
  • 2 篇 natl chiao tung ...
  • 2 篇 nanyang technol ...
  • 2 篇 univ kansas dept...
  • 2 篇 department of el...
  • 2 篇 concordia univ d...
  • 2 篇 jaypee univ engn...
  • 2 篇 democritus univ ...
  • 2 篇 natl chung cheng...
  • 2 篇 mnnit dept elect...
  • 2 篇 univ western ont...

作者

  • 8 篇 meher pramod kum...
  • 5 篇 tsunekawa y
  • 4 篇 wang w
  • 4 篇 guo ji
  • 4 篇 miura m
  • 4 篇 sridevi sriadibh...
  • 3 篇 mohanty basant k...
  • 3 篇 kumar prashant
  • 3 篇 tiwari manish
  • 3 篇 banerjee ayan
  • 3 篇 mohanty basant k...
  • 3 篇 chakraborty anir...
  • 3 篇 anderson david v...
  • 3 篇 nagajyothi grand...
  • 3 篇 shrivastava prab...
  • 2 篇 vijetha k.
  • 2 篇 shaik rafi ahame...
  • 2 篇 singhal subodh k...
  • 2 篇 rana ashwani k.
  • 2 篇 xie qingqing

语言

  • 201 篇 英文
  • 16 篇 其他
  • 4 篇 中文
检索条件"主题词=distributed arithmetic"
221 条 记 录,以下是151-160 订阅
排序:
High speed low area OBC DA based decimation filter for hearing aids application
收藏 引用
INTERNATIONAL JOURNAL OF SPEECH TECHNOLOGY 2020年 第1期23卷 111-121页
作者: NagaJyothi, Grande Sridevi, Sriadibhatla VIT Univ Vellore Tamil Nadu India
This brief presents a decimation filter for hearing aid application using distributed arithmetic (DA) approach. In this paper, we propose a reconfigurable offset-binary code (OBC) DA based finite impulse response (FIR... 详细信息
来源: 评论
Low-cost multi-standard video transform core using time-distribution scheme
收藏 引用
ELECTRONICS LETTERS 2016年 第24期52卷 1980-1981页
作者: Chen, Y. -H. Tseng, Y. -H. Chang Gung Univ Dept Elect Engn Taoyuan Taiwan Chang Gung Univ Ctr Reliabil Sci & Technol Taoyuan Taiwan Natl Tsing Hua Univ Dept Engn & Syst Sci Hsinchu Taiwan Chang Gung Mem Hosp LinKou Dept Radiat Oncol Taoyuan Taiwan
Cost-effective two-dimensional (2D) discrete cosine transform (DCT) and inverse DCT architectures capable of supporting multiple standards of MPEG, H.264 and VC-1 are presented. The proposed core utilises a 1D core an... 详细信息
来源: 评论
A methodology for implementing decimator FIR filters on FPGA
收藏 引用
AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS 2013年 第12期67卷 993-1004页
作者: Harize, Saliha Benouaret, Mohamed Doghmane, Noureddine Badji Mokhtar Univ Fac Engn Sci Annaba Algeria
This paper presents a methodology which can be used to implement any decimator symmetric/antisymmetric (S/A) finite impulse response (FIR) filter. Two varieties are developed: a classic distributed arithmetic (CDA) ba... 详细信息
来源: 评论
Analysis and synthesis of weighted-sum functions
收藏 引用
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2005年 第5期25卷 789-796页
作者: Sasao, T Kyushu Inst Technol Dept Comp Sci & Engn Iizuka Fukuoka 8208502 Japan
A weighted-sum (WS) function computes the sum of selected integers. This paper considers a design method for WS functions by look-up table (LUT) cascades. In particular, it derives upper bounds on the column multiplic... 详细信息
来源: 评论
Implementation of efficient reconfigurable FIR filter with control logic for 5G applications
收藏 引用
SOFT COMPUTING 2021年 第15期25卷 10509-10518页
作者: Raju Kalidindi, S. N. Terlapu, Sudheer Kumar Krishna, M. Vamshi Centurion Univ Technol & Management R Sitapur 761211 Odisha India Shri Vishnu Engn Coll Women Bhimavaram 534202 India Dhanekula Inst Engn & Technol Vijayawada 521151 India
Filters are used to achieve frequency selectivity on the spectrum of input signal. Due to the stability of finite impulse response (FIR) filters, they are used in most of the applications. In the conventional FIR filt... 详细信息
来源: 评论
A 3.5pJ/bit 8-tap-Feed-Forward 8-tap-Decision Feedback Digital Equalizer for 16Gb/s I/Os  40
A 3.5pJ/bit 8-tap-Feed-Forward 8-tap-Decision Feedback Digit...
收藏 引用
40th European Solid-State Circuit Conference (ESSCIRC)
作者: Toifl, Thomas Buchmann, Peter Beukema, Troy Beakes, Michael Braendli, Matthias Francese, Pier Andrea Menolfi, Christian Kossel, Marcel Kull, Lukas Morf, Thomas IBM Res GmbH IBM Zurich Res Lab CH-8803 Ruschlikon Switzerland IBM Corp Div Res Thomas J Watson Res Ctr Yorktown Hts NY 10598 USA
In this paper, we present a digital equalizer for 16Gb/s backplane I/Os which consumes only 3.5pJ/bit for an 8-tap FFE and 4+4 tap DFE operation. Several design choices were chosen to enable low power consumption at h... 详细信息
来源: 评论
A High Speed FPGA Implementation of the 2D DCT for Ultra High Definition Video Coding
A High Speed FPGA Implementation of the 2D DCT for Ultra Hig...
收藏 引用
18th International Conference on Digital Signal Processing (DSP)
作者: Kitsos, Paris Voros, Nikolaos S. Dagiuklas, Tasos Skodras, Athanassios N. Branch Nafpaktos Technol Educ Inst Messolonghi Dept Telecommun Syst & Networks Nafpaktos Greece Hellenic Open Univ Dept Comp Sci Patras Greece Univ Patras Dept Elect & Comp Engn Patras Greece
This paper presents two high performance FPGA architectures for the 2D DCT computation for Ultra High Definition video coding systems. Both architectures use distributed arithmetic to perform the necessary multiplicat... 详细信息
来源: 评论
MSDCT architecture implementation with DA based optimized LUT
MSDCT architecture implementation with DA based optimized LU...
收藏 引用
6th World Congress on Intelligent Control and Automation
作者: Kamran, Muhammad Shi, Feng Ji, Weixing Beijing Inst Technol Dept Comp Sci & Engn Beijing 100081 Peoples R China
In this paper a modified scaled discrete cosine transform hardware implementation is presented which will be further utilized in video chip application. The hardware design is based on the description of the algorithm... 详细信息
来源: 评论
A circular formulation of the prime length DHT kernel and its FPGA implementation  4
A circular formulation of the prime length DHT kernel and it...
收藏 引用
Joint Conference of the 4th International Conference on Information, Communications and Signal Processing/4th Pacific-Rim Conference on Multimedia (ICICS-PCM 2003)
作者: Srikanthan, T Kumar, N Jhavar, A Nanyang Technol Univ Ctr High Performance Embedded Syst Singapore 639798 Singapore
This paper presents a FPGA implementation of a one-dimensional prime-length Discrete Hartley Transform. The architecture for the hardware realization has been formulated to ensure maximum area and time efficiency. The... 详细信息
来源: 评论
Discrete wavelet transform IPcore design for image compression
Discrete wavelet transform IPcore design for image compressi...
收藏 引用
7th International Conference on Signal Processing
作者: Fu, WH Meng, LM Wang, XY Zhejiang Prov. Key Lab. Opt. F.C.T. Zhejiang University of Technology China Eastern Communications Co. Ltd.
Discrete wavelet transform (DWT), which is recently used by some international standard organizations in image compression protocols, has an excellent performance on multiresolution representation. Because of DWT'... 详细信息
来源: 评论