A distributed capacitance model for monolithic inductors is developed to predict the equivalently parasitical capacitances of the *** ratio of the self-resonant frequency (f SR) of the differential-driven symmetric in...
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A distributed capacitance model for monolithic inductors is developed to predict the equivalently parasitical capacitances of the *** ratio of the self-resonant frequency (f SR) of the differential-driven symmetric inductor to the f SR of the single-ended driven inductor is firstly predicted and *** with a single-ended configuration,experimental data demonstrate that the differential inductor offers a 127% greater maximum quality factor and a broader range of operating *** differential inductors with low parasitical capacitance are developed and validated.
The methodology to calculate the parasitic capacitances in differential symmetric inductors will be presented in this paper. Inspired by the proposed methodology, a method called selective metal parallel shunting (SMP...
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The methodology to calculate the parasitic capacitances in differential symmetric inductors will be presented in this paper. Inspired by the proposed methodology, a method called selective metal parallel shunting (SMPS) can move f(Qmax) onto the desired frequency without additional processing steps. Based on the proposed methodology, a customized program is developed to predict Q(max)s and f(Qmax)s of on-chip inductors. Differential symmetric inductors and spiral ones with planar, all metal parallel shunting (AMPS), and SNIPS configurations have been implemented in a 1P4M 0.35-mu m CMOS process to verify the proposed method. Moreover, three 2.3-2.4 GHz voltage-controlled oscillators (VCOs) using planar, AMPS, and SNIPS inductors, have also been realized. The phase noise of the VCO using SNIPS inductors can be improved by 9.3 and 6 dB at 100-kHz offset frequency, respectively, compared to the VCOs using planar and AMPS inductors. The proposed SNIPS technique can not only be applicable to VCO but also other RF circuits.
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