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PPT - A PARALLEL PROGRAMMING TOOL FOR distributed-memory multiprocessors

JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS 1995年第3期18卷 365-378页

作者： CHUNG, YC HO, WH LIU, CC Department of Information Engineering and Computer Science Feng Chia University Taichung 407 Taiwan

Traditionally, to program a distributed memory multiprocessor, a programmer is responsible for partitioning an application program into modules or tasks, scheduling tasks on processors, inserting communication primitives, and generating parallel codes for each processor manually. As both the number of processors and the complexity of problems to be solved increases, programming distributed memory multiprocessors becomes difficult and error-prone. In a distributed memory multiprocessor, the program partitioning and scheduling play an important role in the performance of a parallel program. However, how to find the best program partitioning and scheduling so that the best performance of a parallel program on a distributed memory multiprocessor can be achieved, is not an easy task. In this paper, we present a parallel programming tool, PPT, to aid programmers to find the best program partitioning and scheduling and automatically generate the parallel code for the single program multiple data (SPMD) model on a distributed memory multiprocessor. An example of designing a parallel FFT program by using PPT on an NCUBE-2 is also presented.

关键词： SPMD distributed memory multiprocessors PARALLEL PROGRAMMING TOOLS PROGRAM PARTITIONING SCHEDULING

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Parallel event-driven MOS timing simulator on distributed memory multiprocessors

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IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS 1996年第4期143卷 207-212页

作者： Hsieh, WH Jou, SJ Su, CC Department of Electrical Engineering National Central University Chung-Li Taiwan Republic of China

PMOTA, a parallel event-driven relaxation-based timing simulator of MOS circuits on distributed memory multiprocessors, is proposed. Two new schemes, one a static data distribution and dynamic event assignment, the other a global synchronism local asynchronism scheme, are derived to reduce the communication overhead and achieve high speedup ratio, high processor utilisation, and balanced load among processor elements. Implementation results show that parallel simulations on a distributed memory multiprocessor are feasible for large-scale circuit simulation.

关键词： distributed memory multiprocessors timing simulation parallel processing MOS circuits

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A duplication heuristic for static scheduling of tasks on distributed memory multiprocessors

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JOURNAL OF THE CHINESE INSTITUTE OF ENGINEERS 1995年第6期18卷 845-855页

作者： Chung, YC Liu, CC Liu, JS Department of Information Engineering Feng Chia University Taichung 407 Taiwan

A task duplication heuristic, DSH, was proposed in [11]. The underlying concept of the task duplication heuristic is duplicating some tasks on processors such that the earliest start time of tasks on processors can be reduced, that is, tasks on processors can be executed sooner. This leads to a better scheduling length. In this paper, we propose a more general task duplication heuristic,bottom-up top-down duplication heuristic (BTDH), for static scheduling of directed-acyclic graphs (DAGs) on distributed memory multiprocessors. The key difference between BTDH and DSH is the method used for duplicating tasks. BTDH allows tasks to be duplicated on processors even though the duplication of tasks will temporarily increase the earliest start time of some tasks. DSH only allows those duplications which will reduce the earliest start time of tasks. Simulation results show that, for coarse-grain DAGs, the scheduling length of BTDH is almost the same as the scheduling length of DSH. However, for medium-grain and fine-grain DAGs, BTDH produces better scheduling length than DSH.

关键词： distributed memory multiprocessors scheduling length grain size list scheduling algorithms task duplication

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A parallel formulation of back-propagation learning on distributed memory multiprocessors

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PARALLEL COMPUTING 1997年第12期22卷 1661-1675页

作者： Mahapatra, S Mahapatra, RN Chatterji, BN INDIAN INST TECHNOL DEPT ELECT & ELECT COMMUN ENGNKHARAGPUR 721302W BENGALINDIA

This paper presents a mapping scheme for parallel pipelined execution of the Back-propagation Learning Algorithm on distributed memory multiprocessors. The proposed implementation exhibits inter-layer or pipelined parallelism, unique to the multilayer neural networks. Simple algorithms have been presented, which allow the data transfer involved in both recall and learning phases of the back-propagation algorithm to be carried out with a small communication overhead, The effectiveness of the mapping scheme has been illustrated, by estimating the speedup of the proposed implementation on an array of T-805 transputers.

关键词： multilayer neural networks distributed memory multiprocessors inter-layer parallelism recall phase learning phase speedup performance

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Optimized Parallel Execution of Declarative Programs on distributed memory multiprocessors

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Journal of Computer Science & Technology 1993年第3期8卷 233-242页

作者：沈美明田新民王鼎兴郑纬民温冬婵 Dept.of Computer Science and Technology Tsinghua UniversityBeijing 100084

In this paper,we focus on the compiling implementation of parallel logic language PARLOG and functional language ML on distributed memory *** the graph rewriting framework, a Heterogeneous Parallel Graph Rewriting Execution Model(HPGREM)is presented *** based on HPGREM,a parallel abstract machine PAM/TGR is ***,several optimizing compilation schemes for executing declarative programs on transputer array are proposed. The performance statistics on a transputer array demonstrate the effectiveness of our model,parallel ab- stract machine,optimizing compilation strategies and compiler.

关键词： Declarative language parallel graph rewriting execution model optimized parallel compiler distributed memory multiprocessors parallel abstract machine

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Mapping of backpropagation learning onto distributed memory multiprocessors

Mapping of backpropagation learning onto distributed memory ...

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IEEE 1st International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP 95)

作者： Mahapatra, S Mahapatra, RN INDIAN INST TECHNOL DEPT ELECTR & ELECT COMMUN ENGNKHARAGPUR 721302W BENGALINDIA

ISBN: (纸本)0780320182

This paper presents a mapping scheme for parallel pipelined execution of the Backpropagation Learning Algorithm on distributed memory multiprocessors (DMMs). The proposed implementation exhibits training set parallelism that involves batch updating. Simple algorithms have been presented, which allow the data transfer involved in both forward and backward executions phases of the backpropagation algorithm to be carried out with a small communication overhead. The effectiveness of our mapping has been illustrated, by estimating the speedup of a proposed implementation on an array of T-805 transputers.

关键词： multilayer neural nets distributed memory multiprocessors training set parallelism forward pass backward pass speedup efficiency

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THE METHOD OF MOMENTS FOR ELECTROMAGNETIC TRANSIENTS IN GROUNDING SYSTEMS ON distributed memory multiprocessors

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Parallel Algorithms and Applications 2000年第3期14卷 213-233页

作者： G. Ala[a] E. Francomano[a] A. Tortorici[a] [a] Dipartimento di Ingegneria Elettrica Universit degli Studi di Palermo Palermo Italy

In this paper, the authors present an electromagnetic model suitable to investigate transient performance of electric power substations grounding systems, working in a distributed programming environment. The numerical model, represented by a modified version of the electric field integral equation in frequency domain, is solved by means of the method of moments according to the direct and the iterative numerical formulations. The two computational schemes are described and solved by means or parallel solutions differently grained and oriented to distributed memory computers. Test results, which illustrate the capability of the proposed schemes, are reported and the performances are assessed by using the 128-node Cray T3D architecture.

关键词： Method of moments Transients Grounding systems distributed memory multiprocessors Parallel algorithms

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Environmental modeling on massively parallel computers

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ENVIRONMENTAL MODELLING & SOFTWARE 2000年第5期15卷 489-496页

作者： Pirozzi, MA Zicarelli, M Univ Naples Naval Inst Naples Italy

In a previous work we studied the concurrent implementation of a numerical model, CONDIFP, developed for the analysis of depth-averaged convection-diffusion problems. Initial experiments were conducted on the Intel Touchstone Delta System, using up to 512 processors and different problem sizes. As for other computation-intensive applications, the results demonstrated an asymptotic trend to unity efficiency when the computational load dominates the communication load. This paper relates some other numerical experiences, in both one and two space dimensions with various choices of initial and boundary conditions, carried out on the Intel Paragon XP/S Model L38 with the aim to illustrate the parallel solver versatility and reliability. (C) 2000 Elsevier Science Ltd. All rights reserved.

关键词： convection-diffusion problems parallel algorithms distributed memory multiprocessors

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A performance model for Krylov subspace methods on mesh-based parallel computers

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PARALLEL COMPUTING 1996年第1期22卷 57-74页

作者： deSturler, E Interdisciplinary Project Center for Supercomputing (IPS-ETH Zurich) Swiss Federal Institute of Technology ETH Zentrum CH-8092 Zurich Switzerland

We develop a performance model for Krylov subspace methods implemented on distributed memory parallel computers for which the underlying communication network is a two-dimensional mesh. The model is based on the runtime of a single iteration or cycle of iterations (for methods like GMRES(m)), because the iteration count is problem dependent. Moreover, we intend to use the model only for parallel implementations that do not change the mathematical properties of the method (significantly). The main purpose of this model is a qualitative analysis of the performance;the model is not meant for very accurate predictions. We express the efficiency, speed-up, and runtime as functions of the number of processors scaled by the number of processors that gives the minimal runtime for the given problem size (P-max). This provides a natural way to analyze the performance characteristics for the range of the numbers of processors that can be used effectively. The approach is particularly interesting because it turns out that the performance is characterized completely by the sequential runtime and P-max. The efficiency as a function of the number of processors relative to P-max is independent of the problem size and parameters describing the machine and solution method. Analogous relations can be obtained for the speed-up and runtime. P-max itself, of course, depends on N and the other parameters, and a simple equation for P-max is given. The performance model is also used to evaluate the improvements in the performance if we reduce the communication as described in [7,9,8]. Although the scope of the performance model is limited by assumptions on the load balance and the processor grid, there are several obvious generalizations. One important and straightforward generalization is to higher dimensional meshes. We will discuss such generalizations at the end of this article.

关键词： linear algebra linear systems of equations sparse matrix Krylov subspace method iterative methods distributed memory multiprocessors

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Efficient mapping of backpropagation algorithm onto a network of workstations

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IEEE TRANSACTIONS ON SYSTEMS MAN AND CYBERNETICS PART B-CYBERNETICS 1998年第6期28卷 841-848页

作者： Sudhakar, V Murthy, CSR Indian Inst Technol Dept Comp Sci & Engn Madras 600036 Tamil Nadu India

In this paper, we present an efficient technique for mapping a backpropagation (BP) learning algorithm for multilayered neural networks onto a network of workstations (NOW's). We adopt a vertical partitioning scheme, where each layer in the neural network is divided into p disjoint partitions, and map each partition onto an independent workstation in a network of p workstations. We present a fully distributed version of the BP algorithm and also its speedup analysis. We compare the performance of our algorithm with a recent work involving the vertical partitioning approach for mapping the BP algorithm onto a distributed memory multiprocessor. Our results on SUN 3/50 NOW's show that we are able to achieve better speedups by using only two communication sets and also by avoiding some redundancy in the weights computation for one training cycle of the algorithm.

关键词： backpropagation algorithm distributed memory multiprocessors multilayered neural networks network of workstations network partitioning pattern partitioning performance analysis

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