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Data-race and concurrent-write freedom are undecidable

COMPUTER LANGUAGES SYSTEMS & STRUCTURES 2003年第1-2期29卷 1-13页

作者： Campos, AE Suazo, DA Pontificia Univ Catolica Chile Dept Ciencia Computac Santiago 22 Chile

In a distributed shared memory system, sequential consistency is often assumed as the model for the memory, because it is a natural extension from multitasking in uniprocessor systems. Weaker consistency models allow greater concurrency, but programming is harder, because programs may produce unexpected results. Data-race-free (DRF) and concurrent-write-free (CWF) programs have the same set of possible executions both under a sequentially consistent memory and under some other, weaker model, memories. They can be written for a sequential memory and run unchanged under such a weaker-model memory. Since the sets of possible executions are the same, the run will only produce results that are possible under sequential consistency. This article proves the undecidability of both classes of concurrent programs in a language with if statements, loops, barriers, dynamic process creation, dynamic storage, and recursive data structures, under many models weaker than sequential consistency. Moreover, the article also proves that methods that only add synchronization statements to programs written for sequential consistency must produce some conservatively DRF or CWF programs. (C) 2003 Elsevier Ltd. All rights reserved.

关键词： concurrent programming distributed shared memory static analysis data-race-free programs concurrent-write-free programs undecidability

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C-HEAP:: A heterogeneous multi-processor architecture template and scalable and flexible protocol for the design of embedded signal processing systems

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DESIGN AUTOMATION FOR EMBEDDED SYSTEMS 2002年第3期7卷 233-270页

作者： Nieuwland, A Kang, J Gangwal, OP Sethuraman, R Busá, N Goossens, K Llopis, RP Lippens, P Philips Res Labs NL-5656 AA Eindhoven Netherlands

The key issue in the design of Systems-on-a-Chip (SoC) is to trade-off efficiency against flexibility, and time to market versus cost. Current deep submicron processing technologies enable integration of multiple software programmable processors (e.g., CPUs, DSPs) and dedicated hardware components into a single cost-efficient IC. Our top-down design methodology with various abstraction levels helps designing these ICs in a reasonable amount of time. This methodology starts with a high-level executable specification, and converges towards a silicon implementation. A major task in the design process is to ensure that all components (hardware and software) communicate with each other correctly. In this article, we tackle this problem in the context of the signal processing domain in two ways: we propose a modular, flexible, and scalable heterogeneous multi-processor architecture template based on distributed shared memory, and we present an efficient and transparent protocol for communication and (re)configuration. The protocol implementations have been incorporated in libraries, which allows quick traversal of the various abstraction levels, so enabling incremental design. The design decisions to be taken at each abstraction level are evaluated by means of (co-)simulation. Prototyping is used too, to verify the system's functional correctness. The effectiveness of our approach is illustrated by a design case of a multi-standard video and image codec.

关键词： communication design methodology distributed shared memory embedded systems heterogeneous multi-processor architectures Kahn process networks signal processing applications synchronization protocol

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NONH:A New Cache-Based Coherence Protocol for Linked List Structure DSM System and Its Performance Evaluation

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Journal of Computer Science & Technology 1996年第4期11卷 405-415页

作者：房至一鞠九滨 DepartmentofComputerScience JilinUniversityChangchun130023 DepartmentofComputerScience JilinUniversi

The management of memory coherence is an important problem in distributed shared memory (DSM) system. In a cache-based coherence DSM system using linked list structure, the key to maintaining the coherence and improving system performance is how to manage the owner in the linked list. This paper presents the design of a new management protocol-NONH (New-OwnerNew-Head) and its performance evaluation. The analysis results show that thisprotocol can improve the scalability and performence of a coherent DSM system using linked list. It is also suitable for managing the cache coherency in tree-like hierarchical architecture.

关键词： Linked list cache coherence distributed shared memory

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Exploring virtual network selection algorithms in DSM cache coherence protocols

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IEEE TRANSACTIONS ON PARALLEL AND distributed SYSTEMS 2004年第8期15卷 699-712页

作者： Chaudhuri, M Heinrich, M Cornell Univ Comp Syst Lab Ithaca NY 14853 USA Univ Cent Florida Sch Comp Sci Orlando FL 32816 USA

distributed shared memory (DSM) multiprocessors typically require disjoint networks for deadlock-free execution of cache coherence protocols. This is normally achieved by implementing virtual networks with the help of virtual channels or virtual lanes multiplexed on a single physical network. To keep the coherence protocol simple, messages are usually assigned to virtual lanes in a predefined static manner based on a cycle-free lane assignment dependence graph. However, this static split of virtual networks ( such as request and reply networks) may lead to underutilization of certain virtual networks while saturating the other networks. In this paper, we explore different static and dynamic schemes to select the virtual lanes for outgoing messages and mix the load among them without restricting any particular type of message to be carried only by a particular virtual network. We achieve this by exposing the selection algorithms to the coherence protocol itself, so that it can inject messages into selected virtual lanes based on some local information, and still enjoy deadlock-freedom. Our execution-driven simulation on five applications from the SPLASH-2 suite shows that as the system scales, the virtual network selection algorithms play an important role. For 128-node systems, our dynamic selection algorithm speeds up parallel execution by as much as 22 percent over an optimized baseline system running a modified SGI Origin 2000 protocol. We also explore how network latency, the number of message buffers per virtual lane, and the depth of network interface output queues affect the relative performance of various virtual lane selection algorithms.

关键词： distributed shared memory cache coherence protocol virtual network deadlock-freedom

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The read-copy-update mechanism for supporting real-time applications on shared-memory multiprocessor systems with Linux

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IBM SYSTEMS JOURNAL 2008年第2期47卷 221-236页

作者： Guniguntala, D. McKenney, P. E. Triplett, J. Walpole, J. IBM India Syst & Technol Lab Bangalore 560071 Karnataka India Linux Technol Ctr Bangalore Karnataka India IBM Beaverton Lab Beaverton OR 97006 USA Portland State Univ Hillsboro OR 97124 USA Portland State Univ Beaverton OR 97007 USA

Read-copy update (RCU) is a synchronization mechanism in the Linux (TM) kernel that provides significant improvements in multiprocessor scalability by eliminating the writer-delay problem of readers-writer locking. RCU implementations to date, however, have had the side effect of expanding non-preemptible regions of code, thereby degrading real-time response. We present here a variant of RCU that allows preemption of read-side critical sections and thus is better suited for real-time applications. We summarize priority-inversion issues with locking, present an overview of the RCU mechanism, discuss our counter-based adaptation of RCU for real-time use, describe an additional adaptation of RCU that permits general blocking in readside critical sections, and present performance results. We also discuss an approach for replacing the readers-writer synchronization with RCU in existing implementations.

关键词： MULTIPROCESSORS SCALABILITY (Systems engineering) REAL-time control distributed shared memory LINUX operating systems SYNCHRONIZATION KERNEL functions

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Optimal propagation-based protocols implementing causal memories

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distributed COMPUTING 2006年第6期18卷 461-474页

作者： Baldoni, Roberto Milani, Alessia Piergiovanni, Sara Tucci Univ Roma La Sapienza Dipartimento Informat & Sistemist I-00198 Rome Italy

Ensuring causal consistency in a distributed shared memory (DSM) means all operations executed at each process will be compliant to a causality order relation. This paper first introduces an optimality criterion for a protocol P, based on a complete replication of variables at each process and propagation of write updates, that enforces causal consistency. This criterion measures the capability of a protocol to update the local copy as soon as possible while respecting causal consistency. Then we present an optimal protocol built on top of a reliable broadcast communication primitive and we show how previous protocols based on complete replication presented in the literature are not optimal. Interestingly, we prove that the optimal protocol embeds a system of vector clocks which captures the read/write semantics of a causal memory. From an operational point of view, an optimal protocol strongly reduces its message buffer overhead. Simulation studies show that the optimal protocol roughly buffers a number of messages of one order of magnitude lower than non-optimal ones based on the same communication primitive.

关键词： causal consistency distributed shared memory propagation-based protocols optimality criterion distributed systems

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Efficient Embedded Software Migration towards Clusterized distributed-memory Architectures

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IEEE TRANSACTIONS ON COMPUTERS 2016年第8期65卷 2645-2651页

作者： Garibotti, Rafael Butko, Anastasiia Ost, Luciano Gamatie, Abdoulaye Sassatelli, Gilles Adeniyi-Jones, Chris CNRS LIRMM Lab Montpellier France Univ Leicester Dept Engn Leicester LE1 7RH Leics England ARM Cambridge England

A large portion of existing multithreaded embedded sofware has been programmed according to symmetric shared memory platforms where a monolithic memory block is shared by all cores. Such platforms accommodate popular parallel programming models such as POSIX threads and OpenMP. However with the growing number of cores in modern manycore embedded architectures, they present a bottleneck related to their centralized memory accesses. This paper proposes a solution tailored for an efficient execution of applications defined with shared-memory programming models onto on-chip distributed-memory multicore architectures. It shows how performance, area and energy consumption are significantly improved thanks to the scalability of these architectures. This is illustrated in an open-source realistic design framework, including tools from ASIC to microkernel.

关键词： Multicore programmability software migration distributed shared memory performance scalability

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On the effectiveness of runtime techniques to reduce memory sharing overheads in distributed Java implementations

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CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE 2008年第13期20卷 1509-1538页

作者： Lobosco, Marcelo Loques, Orlando de Amorim, Claudio L. Univ Fed Juiz de Fora Dept Ciencia Comp Juiz De For A MG Brazil Univ Fed Fluminense Inst Comp BR-24210240 Niteroi RJ Brazil Univ Fed Rio de Janeiro COPPE PESC Lab Comp Paralela Rio de Janeiro Brazil

distributed Java virtual machine (dJVM) systems enable concurrent Java applications to transparently run on clusters of commodity computers. This is achieved by supporting Java's shared-memory model over multiple JVMs distributed across the cluster's computer nodes. In this work, we describe and evaluate selective dynatnic diffing and lazy home allocation, two new runtime techniques that enable dJVMs to efficiently support memory sharing across the cluster. Specifically, the two proposed techniques can contribute to reduce the overheads due to message traffic, extra memory space, and high latency of remote memory accesses that such dJVM systems require for implementing their memory-coherence protocol either in isolation or in combination. In order to evaluate the performance-related benefits of dynamic diffing and lazy home allocation, we implemented both techniques in Cooperative JVM (CoJVM), it basic dJVM system we developed in previous work. In subsequent work, we carried out performance comparisons between the basic CoJVM and modified CoJVM versions for five representative concurrent lava applications (matrix multiply, LU, Radix, fast Fourier transform, and SOR) using our proposed techniques. Our experimental results showed that dynamic doffing and lazy home allocation significantly reduced memory sharing overheads. The reduction resulted in considerable gains in CoJVM system's performance, ranging front 9% tip to 20%, in four out of the five applications, with resulting speedups varying front 6.5 tip to 8.1 for in 8-node cluster of computers. Copyright (C) 2007 John Wiley & Sons, Ltd.

关键词： Java JVM distributed shared memory cluster computing concurrent Java applications high performance computing

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Service discovery strategies in ubiquitous communication environments

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IEEE COMMUNICATIONS MAGAZINE 2006年第9期44卷 106-113页

作者： Sivavakeesar, Siva Gonzalez, Oscar F. Pavlou, George Univ Surrey Networks Res Grp Ctr Commun Syst Res Guildford GU2 5XH Surrey England

Past communication and computing trends are inadequate to deal with today's complex, distributed, and diverse network environments. With the recent development of small-size tetherless communication/computing devices and the increasing diversity in their capabilities, autonomic ubiquitous communication environments are emerging. In such environments, the execution of a complex task does not necessarily make use of prconfigured devices or networks, but requires instead the selection of suitable computing elements on-the-fly, based on the task requirements and device characteristics (i.e., networking-on-demand or task-centric networking). Research is currently being carried out in various dimensions in this emerging domain, including, among other approaches for context awareness, service discovery and self-management. In this article we concentrate on proposing a distributed mechanism for discovering suitable service elements on-the-fly.

关键词： UBIQUITOUS computing COMPUTER programming distributed computing EMBEDDED computer systems COMPUTER networks WIDE area networks (Computer networks) distributed shared memory COMPUTERS SYSTEMS development EMBEDDED computer systems -- Programming

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Limitations of fast consistency conditions for distributed shared memories

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INFORMATION PROCESSING LETTERS 1996年第5期57卷 243-248页

作者： Attiya, H Friedman, R TECHNION ISRAEL INST TECHNOL DEPT COMP SCIIL-32000 HAIFAISRAEL CORNELL UNIV DEPT COMP SCIITHACANY 14853

A consistency condition for distributed shared memory is fast if it has a fast implementation in which the execution time of every operation is significantly faster than the network delay. These conditions include Pipelined RAM, weak consistency, causal memory, and one interpretation of processor consistency. It is shown that if a condition is fast then it does not support non-centralized solutions for mutual exclusion.

关键词： distributed computing distributed shared memory consistency conditions

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