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A transparent distributed shared memory for clustered symmetric multiprocessors

JOURNAL OF SUPERCOMPUTING 2006年第2期37卷 145-160页

作者： Chang, Jyh-Biau Shieh, Ce-Kuen Liang, Tyng-Yeu Natl Cheng Kung Univ Dept Elect Engn Tainan 70101 Taiwan Natl Kaohsiung Univ Appl Sci Dept Elect Engn Kaohsiung Taiwan

A transparent distributed shared memory (DSM) system must achieve complete transparency in data distribution, workload distribution, and reconfiguration respectively. The transparency of data distribution allows programmers to be able to access and allocate shared data using the same user interface as is used in shared-memory systems. The transparency of workload distribution and reconfiguration can optimize the parallelism at both the user-level and the kernel-level, and also improve the efficiency of run-time reconfiguration. In this paper, a transparent DSM system referred to as Teamster is proposed and is implemented for clustered symmetric multiprocessors. With the transparency provided by Teamster, programmers can exploit all the computing power of the clustered SMP nodes in a transparent way as they do in single SMP computer. Compared with the results of previous researches, Teamster can realize the transparency of cluster computing and obtain satisfactory system performance.

关键词： distributed shared memory symmetric multiprocessor cluster computing reconfiguration thread architecture

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AN O(1) RMRs LEADER ELECTION ALGORITHM

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SIAM JOURNAL ON COMPUTING 2010年第7期39卷 2726-2760页

作者： Golab, Wojciech Hendler, Danny Woelfel, Philipp Univ Toronto Dept Comp Sci Toronto ON M5S 3G4 Canada Ben Gurion Univ Negev Dept Comp Sci IL-8405 Beer Sheva Israel

The leader election problem is a fundamental coordination problem. We present leader election algorithms for multiprocessor systems where processes communicate by reading and writing shared memory asynchronously and do not fail. In particular, we consider the cache-coherent (CC) and distributed shared memory (DSM) models of such systems. We present leader election algorithms that perform a constant number of remote memory references (RMRs) in the worst case. Our algorithms use splitter-like objects [J. Anderson and M. Moir, Sci. Comput. Programming, 25 (1995), pp. 1-39;H. Attiya and A. Fouren, Theory Comput. Syst., 31 (2001), pp. 642-664] in a novel way, by organizing active processes into teams that share work. As there is an Omega(log n) lower bound on the RMR complexity of mutual exclusion for n processes using reads and writes only [H. Attiya, D. Hendler, and W. Woelfel, in Proceedings of the ACM Symposium on Theory of Computing, ACM, New York, 2008, pp. 217-226], our result separates the mutual exclusion and leader election problems in terms of RMR complexity in both the CC and DSM models. Our result also implies that any algorithm using reads, writes, and one-time test-and-set objects can be simulated by an algorithm using reads and writes with only a constant blowup of the RMR complexity;proving this is easy in the CC model but presents subtle challenges in the DSM model, as we explain later. Anderson, Herman, and Kim raise the question of whether conditional primitives such as test-and-set and compare-and-swap can be used, along with reads and writes, to solve mutual exclusion with better worst-case RMR complexity than is possible using reads and writes only [distributed Computing, 16 (2003), pp. 75-110]. We provide a negative answer to this question in the case of implementing one-time test-and-set.

关键词： leader election remote memory references (RMRs) synchronization multiprocessor test-and-set distributed shared memory cache-coherent shared memory

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Rambo: a robust, reconfigurable atomic memory service for dynamic networks

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distributed COMPUTING 2010年第4期23卷 225-272页

作者： Gilbert, Seth Lynch, Nancy A. Shvartsman, Alexander A. Natl Univ Singapore Singapore 117548 Singapore MIT Cambridge MA 02139 USA Univ Connecticut Storrs CT USA

In this paper, we present Rambo, an algorithm for emulating a read/write distributed shared memory in a dynamic, rapidly changing environment. Rambo provides a highly reliable, highly available service, even as participants join, leave, and fail. In fact, the entire set of participants may change during an execution, as the initial devices depart and are replaced by a new set of devices. Even so, Rambo ensures that data stored in the distributed shared memory remains available and consistent. There are two basic techniques used by Rambo to tolerate dynamic changes. Over short intervals of time, replication suffices to provide fault-tolerance. While some devices may fail and leave, the data remains available at other replicas. Over longer intervals of time, Rambo copes with changing participants via reconfiguration, which incorporates newly joined devices while excluding devices that have departed or failed. The main novelty of Rambo lies in the combination of an efficient reconfiguration mechanism with a quorum-based replication strategy for read/write shared memory. The Rambo algorithm can tolerate a wide variety of aberrant behavior, including lost and delayed messages, participants with unsynchronized clocks, and, more generally, arbitrary asynchrony. Despite such behavior, Rambo guarantees that its data is stored consistency. We analyze the performance of Rambo during periods when the system is relatively well-behaved: messages are delivered in a timely fashion, reconfiguration is not too frequent, etc. We show that in these circumstances, read and write operations are efficient, completing in at most eight message delays.

关键词： Dynamic distributed systems Atomic register distributed shared memory Fault-tolerance Reconfigurable Eventual synchrony

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x86-TSO: A Rigorous and Usable Programmer's Model for x86 Multiprocessors

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COMMUNICATIONS OF THE ACM 2010年第7期53卷 89-97页

作者： Sewell, Peter Sarkar, Susmit Owens, Scott Nardelli, Francesco Zappa Myreen, Magnus O. Univ Cambridge Cambridge CB2 1TN England

Exploiting the multiprocessors that have recently become ubiquitous requires high-performance and reliable concurrent systems code, for concurrent data structures, operating system kernels, synchronization libraries, compilers, and so on. However, concurrent programming, which is always challenging, is made much more so by two problems. First, real multiprocessors typically do not provide the sequentially consistent memory that is assumed by most work on semantics and verification. Instead, they have relaxed memory models, varying in subtle ways between processor families, in which different hardware threads may have only loosely consistent views of a shared memory. Second, the public vendor architectures, supposedly specifying what programmers can rely on, are often in ambiguous informal prose (a particularly poor medium for loose specifications), leading to widespread confusion. In this paper we focus on x86 processors. We review several recent Intel and AMD specifications, showing that all contain serious ambiguities, some are arguably too weak to program above, and some are simply unsound with respect to actual hardware. We present a new x86-TSO programmer's model that, to the best of our knowledge, suffers from none of these problems. It is mathematically precise (rigorously defined in HOL4) but can be presented as an intuitive abstract machine which should be widely accessible to working programmers. We illustrate how this can be used to reason about the correctness of a Linux spinlock implementation and describe a general theory of data-race freedom for x86-TSO. This should put x86 multiprocessor system building on a more solid foundation;it should also provide a basis for future work on verification of such systems.

关键词： MULTIPROCESSORS COMPUTER software correctness COMPUTER programming distributed shared memory COMPUTER multitasking COMPUTER science

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UNAMBIGUOUS shared-memory SYSTEMS

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INTERNATIONAL JOURNAL OF FOUNDATIONS OF COMPUTER SCIENCE 2010年第4期21卷 665-685页

作者： Morin, Remi Lab Informat Fondamentale Marseille F-13288 Marseille 9 France

shared-memory systems appear as a generalization of asynchronous cellular automata. In this paper we relate the partial-order semantics of shared-memory systems to Mazurkiewicz trace languages by means of a new refinement construction. We show that a set of labeled partial orders is recognized by some unambiguous shared-memory system if and only if it is definable in monadic second-order logic and media-bounded.

关键词： distributed shared memory CELLULAR automata SEMANTIC network analysis MACHINE theory TEXT messages (Telephone systems)

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Scalability of Weak Consistency in NoC based Multicore Architectures

Scalability of Weak Consistency in NoC based Multicore Archi...

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International Symposium on Circuits and Systems Nano-Bio Circuit Fabrics and Systems (ISCAS 2010)

作者： Naeem, Abdul Chen, Xiaowen Lu, Zhonghai Jantsch, Axel Royal Inst Technol Sch Informat & Commun Technol Dept Elect Syst Stockholm Sweden

ISBN: (纸本)9781424453092

In Multicore Network-on-Chip, it is preferable to realize distributed but shared memory (DSM) in order to reuse the huge amount of legacy code and easy programming. Within DSM systems, memory consistency is a critical issue since it affects not only performance but also the correctness of programs. In this paper, we investigate the scalability of the weak consistency model, which may be implemented using a transaction counter. The experimental results compare synchronization latencies for various network sizes, topologies and lock positions in the network. Average synchronization latency rises exponentially for mesh and torus topologies as the network size grows. However, torus improves the synchronization latency in comparison to mesh. For mesh topology network average synchronization latency is also slightly affected by the lock position with respect to the network center.

关键词： Synchronization Scalability memory consistency distributed shared memory

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An HDF5 MPI Virtual File Driver for Parallel In-situ Post-processing

An HDF5 MPI Virtual File Driver for Parallel In-situ Post-pr...

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17th European MPI Users Group Meeting

作者： Soumagne, Jerome Biddiscombe, John Clarke, Jerry Swiss Natl Supercomp Ctr CSCS SCR Dept Galleria 2Via Cantonale CH-6928 Manno Switzerland US Army Res Lab CIS Aberdeen Proving Ground MD USA INRIA HiePA CS Res Team Talence France

ISBN: (纸本)9783642156458

With simulation codes becoming more powerful, using more and more resources, and producing larger and larger data, monitoring or post-processing simulation data in-situ has obvious advantages over the conventional approach of saving to and reloading data from the file system. The time it takes to write and then read the data from disk is a significant bottleneck for both the simulation and subsequent post-processing. In order to be able to post-process data as efficiently as possible with minimal disruption to the simulation itself, we have developed a parallel virtual file driver for the HDF5 library which acts as an MPI-IO virtual file layer, allowing the simulation to write in parallel to remotely located distributed shared memory instead of writing to disk.

关键词： distributed shared memory Parallel Systems Large Scale Post-processing Virtual File Layer

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Extending OpenMP for Agent Based DSM on GRID

Extending OpenMP for Agent Based DSM on GRID

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International Joint Conferences on Computer, Information, and Systems Sciences, and Engineering (CISSE)

作者： Haghighi, Mahdi S. Zahedi, M. Hadi Ghazizadeh, Mustafa A. Ahangary, Farnad Ferdowsi Univ Mashhad Dept Comp Fac Engn Mashhad Iran

ISBN: (纸本)9789048191123;9789048191116

This paper discusses some of the salient issues involved in implementing the illusion of a shared-memory programming model across a group of distributed memory processors from a cluster through to an entire GRID. This illusion can be provided by a distributed shared memory (DSM) system implemented by using autonomous agents. Mechanisms that have the potential to increase the performance by omitting consistency latency intra site messages and data transfers are highlighted. In this paper we describe the overall design/architecture of a prototype system, AOMPG which integrates DSM and Agent paradigms and may be the target of an OpenMP compiler. Our goal is to apply this to GRID Applications.

关键词： distributed shared memory AOMPG Agent GRID

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The Cray BlackWidow: A Highly Scalable Vector Multiprocessor 07

The Cray BlackWidow: A Highly Scalable Vector Multiprocessor

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ACM/IEEE SC07 Conference

作者： Abts, Dennis Bataineh, Abdulla Scott, Steve Faanes, Greg Schwarzmeier, Jim Lundberg, Eric Johnson, Tim Bye, Mike Schwoerer, Gerald Cray Inc Chippewa Falls WI 54729 USA

ISBN: (纸本)9781595939746

This paper describes the system architecture of the Cray Black Widow scalable vector multiprocessor The Black Widow system is a distributed shared memory (DSM) architecture that is scalable to 32K processors, each with a 4-way dispatch scalar execution unit and an 8-pipe vector unit capable of 20.8 Gflops for 64-bit operations and 41.6 Gflops for 32-bit operations at the prototype operating frequency of 1.3 GHz. Global memory is directly accessible with processor loads and stores and is globally coherent. The system supports thousands of outstanding references to hide remote memory latencies, and provides a rich suite of built-in synchronization primitives. Each Black Widow node is implemented as a 4-way SMP with up to 128 Gbytes of DDR2 main memory capacity. The system supports common programming models such as MPI and OpenMP, as well as global address space languages such as UPC and CAF We describe the system architecture and microarchitecture of the processor memory controller and router chips. We give preliminary performance results and discuss design tradeoffs.

关键词： multiprocessor shared memory vector MPP fat-tree high-radix distributed shared memory

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引用; SIAM Journal on Computing 2010年第7期39卷 2726-2760页; 作者： Wojciech Golab Danny Hendler Philipp Woelfel; The leader election problem is a fundamental coordination problem. We present leader election algorithms for multiprocessor systems where processes communicate by reading and writing shared memory asynchronously and d... 详细信息; The leader election problem is a fundamental coordination problem. We present leader election algorithms for multiprocessor systems where processes communicate by reading and writing shared memory asynchronously and do not fail. In particular, we consider the cache-coherent (CC) and distributed shared memory (DSM) models of such systems. We present leader election algorithms that perform a constant number of remote memory references (RMRs) in the worst case. Our algorithms use splitter-like objects [J. Anderson and M. Moir, Sci. Comput. Programming, 25 (1995), pp. 1–39; H. Attiya and A. Fouren, Theory Comput. Syst., 31 (2001), pp. 642–664] in a novel way, by organizing active processes into teams that share work. As there is an $Ω (\log n)$; 来源：评论; 学校读者我要写书评

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