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MICROPROCESSORS AND MICROSYSTEMS 2016年第PartB期47卷 262-277页

作者： Alvarez, Carlos Ayguade, Eduard Bosch, Jaume Bueno, Javier Cherkashin, Artem Filgueras, Antonio Jimenez-Gonzalez, Daniel Martorell, Xavier Navarro, Nacho Vidal, Miquel Theodoropoulos, Dimitris Pnevmatikatos, Dionisios N. Catani, Davide Oro, David Fernandez, Carles Segura, Carlos Rodriguez, Javier Hernando, Javier Scordino, Claudio Gai, Paolo Passera, Pierluigi Pomella, Alberto Bettin, Nicola Rizzo, Antonio Giorgi, Roberto Univ Politecn Cataluna Barcelona Supercomp Ctr Barcelona Spain Univ Politecn Cataluna Comp Architecture Dept Barcelona Spain FORTH ICS Iraklion Greece SECO Arezzo Italy Herta Secur Barcelona Spain Univ Politecn Cataluna Barcelona Spain Evidence Srl Pisa Italy VIMAR SpA Marostica Italy Univ Siena Siena Italy

People and objects will soon share the same digital network for information exchange in a world named as the age of the cyber-physical systems. The general expectation is that people and systems will interact in real-time. This poses pressure onto systems design to support increasing demands on computational power, while keeping alow power envelop. Additionally, modular scaling and easy programmability are also important to ensure these systems to become widespread. The whole set of expectations impose scientific and technological challenges that need to be properly addressed. The AXIOM project (Agile, eXtensible, fast I/O Module) will research new hardware/software architectures for cyber-physical systems to meet such expectations. The technical approach aims at solving fundamental problems to enable easy programmability of heterogeneous multi-core multi-board systems. AXIOM proposes the use of the task-based OmpSs programming model, leveraging low-level communication interfaces provided by the hardware. Modular scalability will be possible thanks to a fast interconnect embedded into each module. To this aim, an innovative ARM and FPGA-based board will be designed, with enhanced capabilities for interfacing with the physical world. Its effectiveness will be demonstrated with key scenarios such as Smart Video-Surveillance and Smart Living/Home (domotics). (C) 2016 The Authors. Published by Elsevier B.V.

关键词： Cyber-physical systems Ompss Cluster programming FPGA Programming distributed shared memory Smart home Smart video-surveillance

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A hybrid MPI-OpenMP implementation of an implicit finite-element code on parallel architectures

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INTERNATIONAL JOURNAL OF HIGH PERFORMANCE COMPUTING APPLICATIONS 2002年第4期16卷 371-393页

作者： Mahinthakumar, G Saied, F N Carolina State Univ Dept Civil Engn Raleigh NC 27695 USA Univ Illinois Natl Ctr Supercomp Applicat Performance Engn Grp Chicago IL 60680 USA

The hybrid MPI-OpenMP model is a natural parallel programming paradigm for emerging parallel architectures that are based on symmetric multiprocessor (SMP) clusters. This paper presents a hybrid implementation adapted for an implicit finite-element code developed for groundwater transport simulations. The original code was parallelized for distributed memory architectures using MPI (Message Passing Interface) using a domain decomposition strategy. OpenMP directives were then added to the code (a straightforward loop-level implementation) to use multiple threads within each MPI process. To improve the OpenMP performance, several loop modifications were adopted. The parallel performance results are compared for four modern parallel architectures. The results show that for most of the cases tested, the pure MPI approach outperforms the hybrid model. The exceptions to this observation were mainly due to a limitation in the MPI library implementation on one of the architectures. A general conclusion is that while the hybrid model is a promising approach for SMP cluster architectures, at the time of this writing, the payoff may not be justified for converting all existing MPI codes to hybrid codes. However, improvements in OpenMP compilers combined with potential MPI limitations in SMP nodes may make the hybrid approach more attractive for a broader set of applications in the future.

关键词： COMPUTER interfaces MULTIPROCESSORS distributed shared memory

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Quantifying Eventual Consistency with PBS

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COMMUNICATIONS OF THE ACM 2014年第8期57卷 93-102页

作者： Bailis, Peter Venkataraman, Shivaram Franklin, Michael J. Hellerstein, Joseph M. Stoica, Ion Univ Calif Berkeley Berkeley CA 94720 USA

Data replication results in a fundamental trade-off between operation latency and consistency. At the weak end of the spectrum of possible consistency models is eventual consistency, which provides no limit to the staleness of data returned. However, anecdotally, eventual consistency is often "good enough" for practitioners given its latency and availability benefits. In this work, we explain this phenomenon and demonstrate that, despite their weak guarantees, eventually consistent systems regularly return consistent data while providing lower latency than their strongly consistent counterparts. To quantify the behavior of eventually consistent stores, we introduce Probabilistically Bounded Staleness (PBS), a consistency model that provides expected bounds on data staleness with respect to both versions and wall clock time. We derive a closed-form solution for version-based staleness and model real-time staleness for a large class of quorum replicated, Dynamo-style stores. Using PBS, we measure the trade-off between latency and consistency for partial, non-overlapping quorum systems under Internet production workloads. We quantitatively demonstrate how and why eventually consistent systems frequently return consistent data within tens of milliseconds while offering large latency benefits.

关键词： RESEARCH distributed computing OPEN source software LATENT semantic analysis CONSISTENCY models (Computers) PROBABILISTIC generative models distributed shared memory PERFORMANCE

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Message passing and shared address space parallelism on an SMP cluster

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PARALLEL COMPUTING 2003年第2期29卷 167-186页

作者： Shan, HZ Singh, JP Oliker, L Biswas, R NASA Ames Res Ctr Adv Supercomp NAS Div Moffett Field CA 94035 USA Univ Calif Berkeley Lawrence Berkeley Lab NERSC Berkeley CA 94720 USA Princeton Univ Dept Comp Sci Princeton NJ 08544 USA

Currently, message passing (MP) and shared address space (SAS) are the two leading parallel programming paradigms. MP has been standardized with MPI, and is the more common and mature approach;however, code development can be extremely difficult, especially for irregularly structured computations. SAS offers substantial ease of programming, but may suffer from performance limitations due to poor spatial locality and high protocol overhead. In this paper, we compare the performance of and the programming effort required for six applications under both programming models on a 32-processor PC-SMP cluster, a platform that is becoming increasingly attractive for high-end scientific computing. Our application suite consists of codes that typically do not exhibit scalable performance under shared-memory programming due to their high communication-to-computation ratios and/or complex communication patterns. Results indicate that SAS can achieve about half the parallel efficiency of MPI for most of our applications, while being competitive for the others. A hybrid MPI + SAS strategy shows only a small performance advantage over pure MPI in some cases. Finally, improved implementations of two MPI collective operations on PC-SMP clusters are presented. (C) 2002 Elsevier Science B.V. All rights reserved.

关键词： PC cluster message passing distributed shared memory benchmark applications parallel performance

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A Hopfield neural network based task mapping method

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COMPUTER COMMUNICATIONS 1999年第11期22卷 1068-1079页

作者： Zhu, W Liang, TY Shieh, CK Univ Queensland Dept Comp Sci & Elect Engn St Lucia Qld 4072 Australia Natl Cheng Kung Univ Dept Elect Engn Tainan Taiwan

With a prior knowledge of a program, static mapping aims to identify an optimal clustering strategy that can produce the best performance. In this paper we present a static method that uses Hopfield neural network to cluster the tasks of a parallel program for a given system. This method takes into account both load balancing and communication minimization. The method has been tested on a distributed shared memory system against other three clustering methods. Four programs, SOR, N-body, Gaussian Elimination and VQ, are used in the test. The result shows that our method is superior to the other three. (C) 1999 Elsevier Science B.V. All rights reserved.

关键词： task mapping Hopfield network optimization distributed shared memory

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Benchmarking parallel compilers: A UPC case study

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FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE 2006年第7期22卷 764-775页

作者： El-Ghazawi, Tarek A. Cantonnet, Francois Yao, Yiyi Annareddy, Smita Mohamed, Ahmed S. George Washington Univ Dept Elect & Comp Engn Washington DC 20052 USA

Unified Parallel C (UPC) is an explicit parallel extension to ISO C which follows the Partitioned Global Address Space (PGAS) programming model. UPC, therefore, combines the ability to express parallelism while exploiting locality. To do so, compilers must embody effective UPC-specific optimizations. In this paper we present a strategy for evaluating the performance of PGAS compilers. It is based on emulating possible optimizations and comparing the performance to the raw compiler performance. It will be shown that this technique uncovers missed optimization opportunities. The results also demonstrate that, with such automatic optimizations, the UPC performance will be compared favorably with other paradigms. (C) 2006 Elsevier B.V. All rights reserved.

关键词： distributed shared memory unified parallel C compilers non-uniform memory accesses architecture benchmark NAS parallel benchmark

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distributed HARDWIRED BARRIER SYNCHRONIZATION FOR SCALABLE MULTIPROCESSOR CLUSTERS

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IEEE TRANSACTIONS ON PARALLEL AND distributed SYSTEMS 1995年第6期6卷 591-605页

作者： SHANG, SS HWANG, K KAOHSIUNG POLYTECH INST DEPT COMP ENGNKAOHSIUNGTAIWAN UNIV SO CALIF DEPT ELECT ENGNLOS ANGELESCA 90089

Conventional multiprocessors mostly use centralized, memory-based barriers to synchronize concurrent processes created in multiple processors. These centralized barriers often become the bottleneck or hot spots in the shared memory, In this paper, we overcome the difficulty by presenting a distributed and hardwired barrier architecture, that is hierarchically constructed for fast synchronization in cluster-structured multiprocessors, The hierarchical architecture enables the scalability of cluster-structured multiprocessors. A special set of synchronization primitives is developed for explicit use of distributed barriers dynamically, To show the application of the hardwired barriers, we demonstrate how to synchronize Doall and Doacross loops using a limited number of hardwired barriers, Timing analysis shows an O(10(2)) to O(10(5)) reduction in synchronization overhead, compared with the use of software-controlled barriers implemented in a shared memory, The hardwired architecture is effective is implementing any partially ordered set of barriers or fuzzy barriers with extended synchronization regions, The versatility, scalability, programmability, and low overhead make the distributed barrier architecture attractive in constructing fine-grain, massively parallel MIMD systems using multiprocessor clusters with distributed shared memory.

关键词： BARRIER SYNCHRONIZATION distributed shared memory DOACROSS LOOPS DOALL LOOPS FUZZY BARRIERS PARALLEL PROCESSING PARTIALLY ORDERED BARRIERS SCALABLE MULTIPROCESSORS WIRED-NOR LOGIC

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Adapting workload distribution on software DSM clusters

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SOFTWARE-PRACTICE & EXPERIENCE 2006年第11-12期36卷 1133-1155页

作者： Liu, Yen-Tso Liang, Tyng-Yeu Shieh, Ce-Kuen Natl Kaohsiung Univ Appl Sci Dept Elect Engn Kaohsiung 807 Taiwan Natl Chung Kung Univ Dept Elect Engn Tainan 701 Taiwan

Achieving an appropriate workload distribution is essential if user applications are to achieve a satisfactory performance on software distributed shared memory (SDSM) clusters. To address this problem, the present study develops a novel method for distributing program threads onto the individual computers of SDSM clusters. In contrast to alternative methods, the proposed approach takes account not only of processor speed and data-sharing aspects, but also memory availability, such that application performance can be enhanced through the implementation of appropriate workload distributions. In addition, when distributing the program threads, the proposed method specifically chooses only those computers that can enhance the performance of the application, rather than simply distributing the threads to all the available nodes in the cluster. This location policy makes it possible to specify the appropriate node combinations that optimize program performance while simultaneously maximizing resource utilization. The proposed method is implemented on a testbed referred to as Teamster. The experimental results demonstrate that, compared to alternative methods, the proposed approach delivers a 20-30% improvement in the performance of the chosen test applications. Importantly, it is shown that the proposed method can efficiently specify proper node combinations for the applications. Copyright (C) 2006 John Wiley & Sons, Ltd.

关键词： distributed shared memory workload distribution memory availability location policy node combination

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distributed parallel computing using navigational programming

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INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING 2004年第1期32卷 1-37页

作者： Pan, L Lai, MK Noguchi, K Huseynov, JJ Bic, LF Dillencourt, MB Univ Calif Irvine Sch Informat & Comp Sci Irvine CA 92697 USA

Message Passing ( MP) and distributed shared memory (DSM) are the two most common approaches to distributed parallel computing. MP is difficult to use, whereas DSM is not scalable. Performance scalability and ease of programming can be achieved at the same time by using navigational programming (NavP). This approach combines the advantages of MP and DSM, and it balances convenience and flexibility. Similar to MP, NavP suggests to its programmers the principle of pivot-computes and hence is efficient and scalable. Like DSM, NavP supports incremental parallelization and shared variable programming and is therefore easy to use. The implementation and performance analysis of real-world algorithms, namely parallel Jacobi iteration and parallel Cholesky factorization, presented in this paper supports the claim that the NavP approach is better suited for general-purpose parallel distributed programming than either MP or DSM.

关键词： distributed parallel computing navigational programming message passing distributed shared memory incremental parallelization

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On the performance of distributed objects

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JOURNAL OF SYSTEMS ARCHITECTURE 2000年第5期46卷 411-428页

作者： Venkatesulu, D Gonsalves, TA Hariram, RK Indian Inst Technol Dept Comp Sci & Engn Madras 600036 Tamil Nadu India

Early distributed shared memory systems used the shared virtual memory approach with fixed-size pages, usually 1-8 KB. As this does not match the variable granularity of sharing of most programs, recently the emphasis has shifted to distributed object-oriented systems. With small object sizes, the overhead of inter-process communication could be large enough to make a distributed program too inefficient for practical use. To support research in this area, we have implemented a user-level distributed programming testbed, DIPC, that provides shared memory, semaphores and barriers. We develop a computationally-efficient model of distributed shared memory using approximate queueing network techniques. The model can accommodate several algorithms including central server, migration and read-replication. These models have been carefully validated against measurements on our distributed shared memory testbed. Results indicate that for large granularities of sharing and small access bursts, central server performs better than both migration and read-replication algorithms. Read-replication performs better than migration for small and moderate object sizes for applications with high degree of read-sharing and migration performs better than read-replication for large object sizes for applications having moderate degree of read-sharing. (C) 2000 Published by Elsevier Science B.V. All rights reserved.

关键词： distributed shared memory distributed semaphore distributed barrier mean value analysis queueing network model distributed objects

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