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CBBR: enabling distributed shared memory-based coordination among mobile robots

Science China(Information Sciences) 2016年第8期59卷 23-39页

作者： Xue JIANG Yu HUANG State Key Laboratory for Novel Software Technology Nanjing University

Coordinating mobile robots are widely used in commercial and industrial settings to fulfill various tasks. However, to program the coordination among mobile robots is challenging. A coordination framework is needed to shield the programmer from handling low-level details of robot control and communication, while supporting flexible and cost-effective coordination at the same time. The coordination framework should also be able to well coexist with the underlying robot control. To this end, we propose the Coordination-enabled Behavior-Based Robotics(CBBR) framework. CBBR employs distributed shared memory(DSM) to support coordination. The shared memory illusion built by the DSM greatly simplifies the coordination logic. Moreover,the flexible access patterns of the DSM and the rich consistency semantics of the DSM reads and writes enable flexible and cost-effective coordination. With the coordination support from the DSM, CBBR naturally extends the classical Behavior-Based Robotics(BBR) for robot control. From the perspective of robot control using BBR, the shared variables in the DSM act as the logical sensors capturing the status of coordination. The coordination algorithms are encapsulated into coordination behaviors. Thus, the physical environment status and the coordination status may trigger the physical and the coordination behaviors. The scheduling of both types of behaviors integrates coordination into robot control. We conduct a case study to demonstrate the use of CBBR. The performance measurements show the cost-effectiveness of coordinating mobile robots based on CBBR, in terms of time, space, and energy consumption.

关键词： distributed shared memory behavior-based robotics coordination behavior hierarchy behavior scheduling

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Delay tolerant lazy release consistency for distributed shared memory in opportunistic networks

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PERVASIVE AND MOBILE COMPUTING 2016年 29卷 57-72页

作者： Eary, Chance Kumar, Mohan Zaruba, Gergely Univ Texas Arlington Dept Comp Sci & Engn Box 19015500 UTA BlvdRoom ERB 559 Arlington TX 76019 USA Rochester Inst Technol Dept Comp Sci 102 Lomb Mem Dr Rochester NY 14623 USA

Opportunistic networks (ONs) allow mobile wireless devices to interact with one another through a series of opportunistic contacts. While ONs exploit mobility of devices to route messages and distribute information, the intermittent connections among devices make many traditional computer collaboration paradigms, such as distributed shared memory (DSM), very difficult to realize. DSM systems, developed for traditional networks, rely on relatively stable, consistent connections among participating nodes to function properly. We propose a novel delay tolerant lazy release consistency (DTLRC) mechanism for implementing distributed shared memory in opportunistic networks. DTLRC permits mobile devices to remain independently productive while separated, and provides a mechanism for nodes to regain coherence of shared memory if and when they meet again. DTLRC allows applications to utilize the most coherent data available, even in the challenged environments typical to opportunistic networks. Simulations demonstrate that DTLRC is a viable concept for enhancing cooperation among mobile wireless devices in opportunistic networking environment. (C) 2015 Elsevier B.V. All rights reserved.

关键词： Opportunistic networks Delay tolerant networks distributed systems distributed shared memory Lazy release consistency

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Enabling Mobile Device Coordination over distributed shared memory 22

Enabling Mobile Device Coordination over Distributed Shared ...

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22nd IEEE International Conference on Parallel and distributed Systems (ICPADS)

作者： Huang, Maosen Wei, Hengfeng Huang, Yu Nanjing Univ State Key Lab Novel Software Technol Nanjing 210023 Jiangsu Peoples R China

ISBN: (纸本)9781509044573

distributed shared memory-based coordination has the advantage of simplifying the coordination logic to read/write operations over the illusionary local memory. However, it is notoriously challenging to come up with a cost-effective implementation of the distributed shared memory. The implementation becomes more challenging in mobile environments, due to the resource constraints and the more rapid changes in the computing context. To this end, we propose the Mobile distributed shared memory (MDSM) middleware to facilitate the development of mobile coordination applications. The key constructs in the shared memory are shared registers. shared registers with different read/write patterns are implemented to facilitate flexible coordination. The registers also have different consistency semantics, to enable efficient tradeoff between data consistency and data access cost. An application framework is proposed to simplify the implementation of mobile coordination, relying on the middleware support from MDSM. A case study is conducted to demonstrate the usage of MDSM, where a soccer game application for the mobile phone is developed. Experimental evaluation is conducted to quantify different options of the consistency-latency tradeoff in the case study. The performance measurements show the cost-effectiveness of eventual consistency in this game. We also verify the read/write traces to further explain why eventual consistency practically performs better than it can guarantee.

关键词： distributed shared memory consistency-latency tradeoff mobile coordination middleware atomicity eventual consistency

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distributed shared Persistent memory

Distributed Shared Persistent Memory

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Symposium on Cloud Computing (SoCC)

作者： Shan, Yizhou Tsai, Shin-Yeh Zhang, Yiying Purdue Univ W Lafayette IN 47907 USA

ISBN: (纸本)9781450350280

Next-generation non-volatile memories (NVMs) will provide byte addressability, persistence, high density, and DRAM-like performance. They have the potential to benefit many datacenter applications. However, most previous research on NVMs has focused on using them in a single machine environment. It is still unclear how to best utilize them in distributed, datacenter environments. We introduce distributed shared Persistent memory (DSPM), a new framework for using persistent memories in distributed datacenter environments. DSPM provides a new abstraction that allows applications to both perform traditional memory load and store instructions and to name, share, and persist their data. We built Hotpot, a kernel-level DSPM system that provides lowlatency, transparent memory accesses, data persistence, data reliability, and high availability. The key ideas of Hotpot are to integrate distributed memory caching and data replication techniques and to exploit application hints. We implemented Hotpot in the Linux kernel and demonstrated its benefits by building a distributed graph engine on Hotpot and porting a NoSQL database to Hotpot. Our evaluation shows that Hotpot outperforms a recent distributed shared memory system by 1.3x to 3.2x and a recent distributed PM-based file system by 1.5x to 3.0x.

关键词： Persistent memory distributed shared memory

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A Design and Implementation of SDN Multicast for distributed shared memory 9

A Design and Implementation of SDN Multicast for Distributed...

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International Conference on Future Generation Communication and Networking

作者： Gao, Qiang Tong, Weiqin Kausar, Samina Zheng, Shengan Shanghai Univ Sch Comp Engn & Sci Shanghai Peoples R China Shanghai Jiao Tong Univ Dept Comp Sci & Engn Shanghai Peoples R China

ISBN: (纸本)9781467398343

distributed shared memory typically use conventional Ethernet as communication medium using broadcast or multicast for synchronization mechanisms. This causes uncertainty of time spent in synchronization and interruption of unrelated processes in the same multicast group. In this research, we propose a dynamic SDN multicast mechanism to improve efficiency of synchronization for distributed shared memory by using an SDN-based multicast forwarding rule and a dynamic core based tree algorithm. The experiments on the prototype system demonstrate that it could provide better performance compared to the conventional Ethernet based solution in terms of response time and process scheduling in the homogeneous testing environment.

关键词： Core based tree distributed shared memory Multicast Openflow SDN

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Scalability Analysis of memory Consistency Models in NoC-based distributed shared memory SoCs

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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2013年第5期32卷 760-773页

作者： Naeem, Abdul Jantsch, Axel Lu, Zhonghai KTH Royal Inst Technol Dept Elect Syst Sch Informat & Commun Technol SE-16440 Stockholm Sweden

We analyze the scalability of six memory consistency models in network-on-chip (NoC)-based distributed shared memory multicore systems: 1) protected release consistency (PRC);2) release consistency (RC);3) weak consistency (WC);4) partial store ordering (PSO);5) total store ordering (TSO);and 6) sequential consistency (SC). Their realizations are based on a transaction counter and an address-stack-based approach. The scalability analysis is based on different workloads mapped on various sizes of networks using different problem sizes. For the experiments, we use Nostrum NoC-based configurable multicore platform with a 2-D mesh topology and a deflection routing algorithm. Under the synthetic workloads, the average execution time for the PRC, RC, WC, PSO, and TSO models in the 8 x 8 network (64-cores) is reduced by 32.3%, 28.3%, 20.1%, 13.8%, and 9.9% over the SC model, respectively. For the application workloads, as the network size grows, the average execution time under these relaxed memory models decreases with respect to the SC model depending on the application and its match to the architecture. The performance improvement of the PRC and RC models over the SC model tends to be higher than 50% as observed in the experiments, when the system is further scaled up. The area cost in the network interface for the relaxed memory models is increased by less than 4% over the SC model.

关键词： distributed shared memory memory consistency network-on-chip performance scalability

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A distributed Real-Time Operating System with distributed shared memory for Embedded Control Systems

A Distributed Real-Time Operating System with Distributed Sh...

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11th IEEE International Conference on Dependable, Autonomic and Secure Computing (DASC)

作者： Chiba, Takahiro Yoo, Myungryun Yokoyama, Takanori Tokyo City Univ Setagaya Ku Tokyo 1588557 Japan

ISBN: (纸本)9781479933815

The paper presents a distributed real-time operating system (DRTOS) that provides a distributed shared memory (DSM) service for distributed control systems. Model-based design has become popular in embedded control software design and the source code of software modules can be generated from a controller model. The generated software modules exchange their input and output values through shared variables. We develop a DRTOS with a real-time DSM service to provide a location-transparent environment, in which distributed software modules can exchange input and output values through the DSM. The DRTOS is an extension to OSEK OS. We use a real-time network called FlexRay, which is based on a TDMA (Time Division Multiple Access) protocol. The consistency of the DSM is maintained according to the order of data transfer through FlexRay, not using inter-node synchronization. The worst case response time of the DSM is predictable if the FlexRay communication is well configured.

关键词： operating systems real-time systems embedded systems distributed shared memory distributed control systems

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Research on inter-process communication based on multi-core MCUs 36

Research on inter-process communication based on multi-core ...

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36th Chinese Control and Decision Conference (CCDC)

作者： Guo, Yuhang Chen, Chen Li, Tao Gai, Runsen Wang, Yong Wuhan Univ Sci & Technol Sch Informat Sci & Engn Wuhan Peoples R China Spintrol Ltd Dept Motor & Power Control Res Shenzhen Peoples R China

ISBN: (纸本)9798350387780;9798350387797

In the field of embedded systems, the challenges associated with the application of multi-core MCUs are primarily manifested in the process of inter-process communication. Although communication methods between cores based on operating systems have matured to a considerable extent, achieving a satisfactory balance between communication efficiency and capacity remains a difficult endeavor. Some inter-process communication algorithms based on operating systems still largely reside in the theoretical domain, with practical implementation being some distance away. In embedded systems without an operating system, shared memory serves as a module capable of direct interaction with the MCU, offering significant advantages in terms of communication efficiency and capacity. This article is grounded in shared memory and presents a design for distributed shared memory inter-process communication, using the iterative computation model of an induction motor. Experimental comparisons are conducted between this approach and the RPMessage inter-process communication method, with respect to communication speed compared to single-core computation. The experiments demonstrate that the distributed shared memory approach can significantly reduce computation time during data processing, as opposed to single-core computation. This research holds valuable implications for the application of inter-process communication in multi-core MCUs.

关键词： multi-core MCUs inter-process communication shared memory distributed shared memory RPMessage

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Benchmarking and Dissecting the Nvidia Hopper GPU Architecture 38

Benchmarking and Dissecting the Nvidia Hopper GPU Architectu...

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International Parallel and distributed Processing Symposium (IPDPS)

作者： Luo, Weile Fan, Ruibo Li, Zeyu Du, Dayou Wang, Qiang Chu, Xiaowen Hong Kong Univ Sci & Technol Guangzhou Hong Kong Peoples R China Harbin Inst Technol Shenzhen Peoples R China

ISBN: (纸本)9798350387117;9798350387124

Graphics processing units (GPUs) are continually evolving to cater to the computational demands of contemporary general-purpose workloads, particularly those driven by artificial intelligence (AI) utilizing deep learning techniques. A substantial body of studies have been dedicated to dissecting the micro-architectural metrics characterizing diverse GPU generations, which helps researchers understand the hardware details and leverage them to optimize the GPU programs. However, the latest Hopper GPUs present a set of novel attributes, including new tensor cores supporting FP8, DPX, and distributed shared memory. Their details still remain mysterious in terms of performance and operational characteristics. In this research, we propose an extensive benchmarking study focused on the Hopper GPU. The objective is to unveil its microarchitectural intricacies through an examination of the new instruction-set architecture (ISA) of Nvidia GPUs and the utilization of new CUDA APIs. Our approach involves two main aspects. Firstly, we conduct conventional latency and throughput comparison benchmarks across the three most recent GPU architectures, namely Hopper, Ada, and Ampere. Secondly, we delve into a comprehensive discussion and benchmarking of the latest Hopper features, encompassing the Hopper DPX dynamic programming (DP) instruction set, distributed shared memory, and the availability of FP8 tensor cores. The microbenchmarking results we present offer a deeper understanding of the novel GPU AI function units and programming features introduced by the Hopper architecture. This newfound understanding is expected to greatly facilitate software optimization and modeling efforts for GPU architectures. To the best of our knowledge, this study makes the first attempt to demystify the tensor core performance and programming instruction sets unique to Hopper GPUs.

关键词： Instruction Latency Tensor Core PTX Hopper DPX Asynchronous Execution distributed shared memory

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RMAI: Rethinking memory for AI (Inference) In-Kernel Remote shared memory as a Software Alternative to CXL 5

RMAI: Rethinking Memory for AI (Inference) In-Kernel Remote ...

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5th Workshop on Machine Learning and Systems-EUROMLSYS-Annual

作者： Noohi, Amir Derispour, Mostafa Barbalace, Antonio Univ Edinburgh Edinburgh Scotland Isfahan Univ Technol Esfahan Iran

ISBN: (纸本)9798400715389

As AI models grow exponentially in size, memory has emerged as a critical bottleneck for inference at scale. While hardware solutions like Compute Express Link (CXL) promises to solve the problem of memory capacity and sharing, they require capital investment, and are not widely available. This paper presents RMAI, an in-kernel remote shared memory framework tailored for AI inference workloads, offering a transparent, scalable, and cost-effective software alternative to hardware-based memory expansion and sharing solutions. By leveraging the operating system's capabilities, RMAI introduces dynamic virtual memory regions that reduce page faults, minimize overheads associated with user-kernel transitions, and optimize data locality for inference workloads. In this paper, we particularly focus on Mixture-of-Experts (MoE) models. In this initial evaluation we demonstrate that RMAI achieves performance levels comparable to CXL-like architectures, with up to 10x faster expert switching and reduced memory management overhead across large-scale inference tasks compared to disk-based solutions. This work redefines the role of remote shared memory in AI systems, positioning it as a practical and high-performance solution for memory capacity and sharing in modern data centers.

关键词： memory disaggregation distributed shared memory Mixture of Experts Kernel-level memory management RDMA (Remote Direct memory Access) Compute Express Link (CXL) Operating system memory management Partitioned Global Address Space (PGAS) Large-scale AI models

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