Recently, a robust and secure image sharing scheme with personal identity information embedded was proposed based on Compressive Sensing, Secret Image Sharing and Diffie-Hellman Agreement. However, there exists a secu...
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Recently, a robust and secure image sharing scheme with personal identity information embedded was proposed based on Compressive Sensing, Secret Image Sharing and Diffie-Hellman Agreement. However, there exists a security flaw in this scheme. It cannot resist the man-in-the-middle attack in the authentication stage. Anyone can disguise himself as a legal person and get the information when exchanging the secret keys, which provides the possibility for information leakage, tampering, and other attacks. In this paper, we propose an image encryption and compression algorithm with identity authentication and blind signcryption based on Parallel Compressive Sensing (PCS), Secret Sharing(SS) and ellipticcurve Cryptography (ECC). Firstly, Logistic-Tent system and PCS are employed to complete compression and lightweight encryption in the compression stage. Secondly, random sequences are generated based on Chebyshev map to construct four encryption matrices to perform the encryption process. Meanwhile, the participants' identity authentication and blind signcryption can be achieved by using ECC. Finally, we prove the efficiency and security of the blind signcryption, which can authenticate the participants' identity before restoring the original image. Experiments and security analysis demonstrate that the proposed scheme not only reduce the storage space and computational complexity effectively, but also has resistance against the man-in-the-middle attack, forgery attack and chosen-text attack.
In this paper, we present the design and analysis of an energy-efficient 163-b ellipticcurvecryptographic (ECC) processor suitable for passive ultrahigh frequency (UHF) radio frequency identification (RFID) tags tha...
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In this paper, we present the design and analysis of an energy-efficient 163-b ellipticcurvecryptographic (ECC) processor suitable for passive ultrahigh frequency (UHF) radio frequency identification (RFID) tags that are usable for banknote authentication and anti-counterfeiting. Even partial public key cryptographic functionality has long been thought to consume too much power and to be too slow to be usable in passive UHF RFID systems. Utilizing a low-power design strategy with optimized register file management and an architecture based on the Lopez Dahab algorithm, we designed a low-power ECC processor that is used with a modified ECC-DH authentication protocol. The ECC-DH authentication protocol is compatible with the ISO/IEC 18000-63 ("Gen2") passive UHF RFID protocol. The ECC processor requires 12 145 gate equivalents. The ECC processor consumes 5.04 nJ/b at a frequency of 960 kHz when implemented in a 0.13-mu m standard CMOS process. The tag identity authentication function requires 30 600 cycles to complete all scalar multiplication operations. This size, speed, and power of the ECC processor makes it practical to use within a passive UHF RFID tag and achieve up to 1500 banknote authentications per minute, which is sufficient for use in the fastest banknote counting machines.
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