embedded multi-core systems are gaining popularity for many embedded applications. Compared to the multi-core design for general purpose high performance computing, the memory design for an embedded multi-core process...
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ISBN:
(纸本)9781612848570
embedded multi-core systems are gaining popularity for many embedded applications. Compared to the multi-core design for general purpose high performance computing, the memory design for an embedded multi-core processor should be customized and adapt to embedded application's characteristics, because it usually has significant impact on the system performance. In this paper, we study a 3dembedded multi-core dsp processor called3d-iSPA, which is targeted for multimedia applications with two unique design features and leverages 3ddRAM stacking to improve performance. Many memory controller and wider memory data bus are proposed to make better use of the vertical through-silicon-via ( TSV). The experimental results shows that duplicating memory controller can provide 10X speedup. The pure wider memory bus, however, has weak impact on the performance due to the limitation of on-chip interconnect.(1)
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