Learn to design and develop safe and reliable embedded systemsAbout This Book• Identify and overcome challenges in embedded environments• Understand the steps required to increase the security of IoT solutions• Build ...
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ISBN:
(数字)9781788830287
ISBN:
(纸本)9781788832502
Learn to design and develop safe and reliable embedded systems
About This Book
• Identify and overcome challenges in embedded environments
• Understand the steps required to increase the security of IoT solutions
• Build safety-critical and memory-safe parallel and distributed embedded systems
Who This Book Is For
If you’re a software developer or designer wanting to learn about embedded programming, this is the book for you. You’ll also find this book useful if you’re a less experienced embedded programmer willing to expand your knowledge.
What You Will Learn
• Participate in the design and definition phase of an embedded product
• Get to grips with writing code for ARM Cortex-M microcontrollers
• Build an embedded development lab and optimize the workflow
• Write memory-safe code
• Understand the architecture behind the communication interfaces
• Understand the design and development patterns for connected and distributed devices in the IoT
• Master multitask parallel execution patterns and real-time operating systems
In Detail
embedded systems are self-contained devices with a dedicated purpose. We come across a variety of fields of applications for embedded systems in industries such as automotive, telecommunications, healthcare and consumer electronics, just to name a few.
embedded Systems Architecture begins with a bird's eye view of embedded development and how it differs from the other systems that you may be familiar with. You will first be guided to set up an optimal development environment, then move on to software tools and methodologies to improve the work flow. You will explore the boot-up mechanisms and the memory management strategies typical of a real-time embedded system. Through the analysis of the programming interface of the reference microcontroller, you'll look at the implementation of the features and the device drivers. Next, you'll learn about the techniques used to reduce power consumption. Then you will be introduced to the techno
Aim of this thesis is to develop a home thermoregulation system. There is an embed- ded device from the STM32 platform that measures actual temperature and regulates the heating based on users preferences. This device...
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Aim of this thesis is to develop a home thermoregulation system. There is an embed- ded device from the STM32 platform that measures actual temperature and regulates the heating based on users preferences. This device communicates with a central web server through which user can monitor all his devices and change heating preferences on them. Implementation of the communication protocol between the embedded device and the web server periodically sends measured temperature from the embedded device and synchronizes heating preferences on both sides. 1
The threshold voltage setting of the pulse counting discriminator corresponding to each of the three photomultiplier tubes (PMTs) is crucial in a Triple to Double Coincidence Ratio (TDCR) system for accurate measureme...
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The threshold voltage setting of the pulse counting discriminator corresponding to each of the three photomultiplier tubes (PMTs) is crucial in a Triple to Double Coincidence Ratio (TDCR) system for accurate measurement of the activity of a radionuclide. The discriminator threshold voltage of each PMT signal processing channel is required to be set before the single electron response peak and after the thermal noise to allow the detection of a single photoelectron from the photocathode of the PMT. The portable TDCR systems, when subject to different field environments for accurate in-situ activity measurements, may need the re-setting of the discriminator threshold of the PMT channels. However, such miniaturized systems have minimal access to the circuit components for the sake of compactness. Therefore, an automatic solution to obviate the need for access to the circuit components (test connectors/test points) and the measuring instruments in the field is preferred. A Field Programmable Gate Array (FPGA) based automated methodology for identifying and digitally controlling the discriminator threshold voltage in standalone, portable TDCR systems is discussed.
The background that underlies this work is the envisioned real-time tele-immersive collaboration system for the future that supports delay-sensitive applications involving participants from remote places via their col...
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The background that underlies this work is the envisioned real-time tele-immersive collaboration system for the future that supports delay-sensitive applications involving participants from remote places via their collaboration spaces (CSs). The end-to-end delay as high as 20 ms is required for good synchronization of such applications, for example collaborative dancing and remote conducting of choir. It is much lower than that facilitated by existing teleconference systems. A novel network architecture with delay guarantee, namely Distributed Multimedia Plays (DMP), has been proposed and designed to realize the vision. The maximum low latency is guaranteed because DMP network nodes can drop DMP packets of multimedia data from the CSs due to instantaneous traffic condition. Besides ultrafast processing time, modularity, and scalability must be taken into account in hardware design and implementation of the nodes for seamless incorporation of the modules. These lead us to employing field-programmable gate array (FPGA) due to its substantial computational power and exibility. This paper presents an FPGA-based platform for the design and implementation of DMP network nodes. It provides a detailed introduction to the platform architecture and the simulation-implementation environment for the design. The modularity of the implemented node is shown by addressing three important modules for packet dropping, 3D warping, and image transform. Our compact implementation of the network node on Xilinx Virtex-6 ML605 mostly consumes very small amount of available resources. Moreover the elementary operations on our implementation takes (much) less than 5 mu s as desired to meet the low-latency requirement.
This paper focuses on the interdisciplinary research on the design of a smart gateway for managing the dynamic error code testing collected and generated by the Electronic Control Unit (ECU) from the automotive indust...
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This paper focuses on the interdisciplinary research on the design of a smart gateway for managing the dynamic error code testing collected and generated by the Electronic Control Unit (ECU) from the automotive industry. The techniques used to exchange information between the ECU code errors and knowledge bases, based on data fusion methods, allowed us to consolidate and ensure data reliability, and then to optimize processed data in our distributed electronic systems, as the basic state for Industry 4.0 standards. At the same time, they offered optimized data packets when the gateway was tested as a service integrator for ECU maintenance. The embedded programming solutions offered us safe, reliable, and flexible data packet management results on both communication systems (Transmission Control Protocol/Internet Provider (TCP/IP) and Controller Area Network (CAN) Bus) on the Electronic Control Unit (ECU) tested for diesel, high-pressure common rail engines. The main goal of this paper is to provide a solution for a smart, hardware-software, Industry-4.0-ready gateway applicable in the automotive industry.
This research was conducted to allow real-time transmission, processing and presentation of data to swimming coaches and subsequently their swimmers in a training environment. This was done using an integrated system ...
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This research was conducted to allow real-time transmission, processing and presentation of data to swimming coaches and subsequently their swimmers in a training environment. This was done using an integrated system which comprised of a wireless sensor node, vision components and both force and pressure measurement technologies. Filtering approaches and signal processing algorithms were used to allow real-time data analysis on the node. Immediate feedback to the coach and sports scientist on poolside allows for a swimmer to be given quantifiable coaching tips and enables them to adjust their performance based on the results obtained. The system has reduced the time for processing acquired data and has delivered novel monitoring devices suitable for the harshness of the pool environment.
In this paper we introduce the embedded Vision Engine (EVE), a novel vision accelerator designed to complement digital signal processors on low- and mid-level vision algorithms. We illustrate EVE's performance on ...
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ISBN:
(纸本)9781479934331
In this paper we introduce the embedded Vision Engine (EVE), a novel vision accelerator designed to complement digital signal processors on low- and mid-level vision algorithms. We illustrate EVE's performance on three important mid-level vision functions, the Hough transform for circles, integral image and calculating the Rotation invariant Binary Robust Independent Elementary Feature (RBRIEF) descriptor. EVE can execute these functions 4 times faster than the state-of-the-art digital signal processor. With other vision functions accelerated 3-12X, the acceleration of these popular vision functions contribute to the application level speed up of 5x on common automotive vision applications. This demonstrates that EVE, while working at powers comparable to the power of a DSP core, can deliver significant boost in performance.
作者：
Martin CarrollBell Laboratories
Innovations for Lucent Technologies 700 Mountain Avenue Murray Hill NJ 07974-2070 U.S.A.
A widely useful technique for implementing complex programs is to use multiple threads of execution. Unfortunately, when we multithread a program we introduce the potential for bugs caused by unprotected critical sect...
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