Serial link interconnection has generated a lot of attention in on-chip bus design due to its advantages over multibit parallel interconnection in terms of crosstalk, skew, and area cost. However, serializing a multi-...
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ISBN:
(纸本)9781457719219
Serial link interconnection has generated a lot of attention in on-chip bus design due to its advantages over multibit parallel interconnection in terms of crosstalk, skew, and area cost. However, serializing a multi-bit parallel bus tends to increase the bit transition and power dissipation. This paper proposes an embeddedtransitioninversion (ETI) codingscheme that uses the phase difference between the clock and data in the transmitted serial data to address the problem of the extra indication bit. This ETI codingscheme reduces the transition by up to 31% compared with the encoding followed by serial (ES) scheme. The analysis and simulation results, in this study indicate that the proposed codingscheme produces a low bit transition for different kinds of data pattern.
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