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Efficient 3D Hilbert Curve encoding and Decoding algorithms

Chinese Journal of Electronics 2022年第2期31卷 277-284页

作者： JIA Lianyin LIANG Binbin LI Mengjuan LIU Yong CHEN Yinong DING Jiaman Faculty of Information Engineering and Automation Kunming University of Science and Technology Yunnan Key Laboratory of Artificial Intelligence Kunming University of Science and Technology Library Yunnan Normal University School of Information Science and Engineering Guangxi University for Nationalities School of Computing Informatics and Decision Systems Arizona State University

Hilbert curve describes a one-to-one mapping between multidimensional space and 1 D *** traditional 3D Hilbert encoding and decoding algorithms work on order-wise manner and are not aware of the difference between different input data and spend equivalent computing costs on them, thus resulting in a low efficiency. To solve this problem, in this paper we design efficient 3D state views for fast encoding and decoding. Based on the state views designed, a new encoding algorithm(JFK-3HE) and a new decoding algorithm(JFK-3HD) are proposed. JFK-3HE and JFK-3HD can avoid executing iteratively encoding or decoding each order by skipping the first 0 s in input data, thus decreasing the complexity and improving the efficiency. Experimental results show that JFK-3HE and JFK-3HD outperform the state-of-the-arts algorithms for both uniform and skew-distributed data.

关键词： order-wise manner multidimensional space encoding state-of-the-arts algorithms encoding algorithm parallel algorithms JFK-3HE statistical distributions decoding solid modelling design efficient 3D JFK-3HD traditional 3D Hilbert encoding equivalent computing costs different input data decoding algorithm Hilbert curve state views iterative methods

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An FPGA-based QC-LDPC encoder design 5

An FPGA-based QC-LDPC encoder design

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5th International Conference on Computer Engineering and Application (ICCEA)

作者： Yang, Yunling Li, Nan Natl Univ Def Technol Coll Elect Sci Changsha Peoples R China

ISBN: (纸本)9798350386783;9798350386776

Low-density parity-check (LDPC) codes have been widely used to deal with noise interference and improve the reliability of the system due to their excellent error correction performance. At the same time, with the increase of storage density in digital storage devices, LDPC codes are also applied to the error checking and correcting (ECC) module to solve the situation of random flipping of stored data bits. In this paper, the progressive edge growing (PEG) algorithm is used to construct a high-rate Quasi Cyclic-LDPC (QC-LDPC) code suitable for the ECC module of the storage device, and the generator matrix is analyzed, and finally a high-efficiency encoder is designed based on the FPGA to quickly generate the parity-check bits in the storage device. The encoder in this study can achieve a throughput of 106.4Mbps at a 50MHz clock.

关键词： encoding algorithm progressive edge growing algorithm quasi-cyclic low-density parity-check (QC-LDPC) encoder

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Design of Nonbinary Error Correction Codes With a Maximum Run-Length Constraint to Correct a Single Insertion or Deletion Error for DNA Storage

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IEEE ACCESS 2021年 9卷 135354-135363页

作者： Lu, Xiaozhou Kim, Sunghwan Univ Ulsan Dept Elect Elect & Comp Engn Ulsan 44610 South Korea

Due to the advantages of high information densities and longevity, DNA storage systems have begun to attract a lot of attention. However, common obstacles to DNA storage are caused by insertion, deletion, and substitution errors occurring in DNA synthesis and sequencing. In this paper, we first explain a method to convert binary data into general maximum run-length r sequences with specific length construction, which can be used as the message sequence of our proposed code. Then, we propose a new single insertion/deletion nonbinary systematic error correction code and its corresponding encoding algorithm. For the proposed code, we design the fixed maximum run-length r in the parity sequence of the proposed code to be three. Additionally, the last parity symbol and the first message symbol are always different. Hence, the overall maximum run-length r of the output codeword is guaranteed to be three when the maximum run-length of the message sequence is three. Finally, we determine the feasibility of the proposed encoding algorithm, verify successful decoding when a single insertion/deletion error occurs in the codeword, and present the comparison results with relevant works.

关键词： Codes DNA encoding Systematics Error correction codes Sequential analysis Decoding DNA storage maximum run-length insertion or deletion error nonbinary systematic error correction code encoding algorithm

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Coding with Noiseless Feedback over the Z-Channel 1

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26th International Computing and Combinatorics Conference (COCOON)

作者： Deppe, Christian Lebedev, Vladimir Maringer, Georg Polyanskii, Nikita Tech Univ Munich Inst Commun Engn Munich Germany Russian Acad Sci Kharkevich Inst Informat Transmiss Problems Moscow Russia

ISBN: (数字)9783030581503

ISBN: (纸本)9783030581503;9783030581497

In this paper, we consider encoding strategies for the Z-channel with noiseless feedback. We analyze the asymptotic case where the maximal number of errors is proportional to the blocklength, which goes to infinity. Without feedback, the asymptotic rate of error-correcting codes for the error fraction tau >= 1/4 is known to be zero. It was also proved that using the feedback a non-zero asymptotic rate can be achieved for the error fraction tau < 1/2. In this paper, we give an encoding strategy that achieves the asymptotic rate (1+ tau)(1- h(T/ (1+ tau))), which is positive for all tau < 1. Additionally, we state an upper bound on the maximal asymptotic rate of error-correcting codes for the Z-channel.

关键词： Coding with feedback Z channel encoding algorithm

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7-2: High-contrast encoding Method for Amplitude-only Computer Generated Hologram

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SID Symposium Digest of Technical Papers 2018年第1期49卷

作者： Jungkwuen An Bongsu Shin Chang-Kun Lee Chil-Sung Choi Chorong Yoo Geeyoung Sung Hojung Kim Hoon Song Jae-Seung Chung Juwon Seo Kanghee Won Sung-Hoon Lee Sunil Kim Wontaek Seo Yongkyu Kim Young Kim Yun-Tae Kim Hong-Seok Lee Duckhyung Lee Imaging Device Lab Samsung Advanced Institute of Technology Samsung Electronics Suwon Gyeonggi-do Korea

The new encoding methods are proposed and demonstrated for amplitude-only computer-generated hologram (CGH). Traditionally, the amplitude-only encoding method proposed by Burch, has been used over 50 years, because it is the deterministic solution for generating an ideal hologram added by its conjugated hologram. Since the amplitude-only hologram cannot represent negative values, the result of Burch's encoding should always be added by some values, so that none of data is less than zero. It means that the electric-field of zero amplitude mapped into the medium gray level in a spatial light modulator (SLM). In ideal holographic display, it does not cause any problem on reconstructing holograms, but the medium gray level actually adds the noise at the practical holographic display. We introduce the encoding methods which can map the zero amplitude into the zero gray level. These encoding methods can increase the contrast ratio of an amplitude-only hologram by reducing unnecessary scattering and stray lights.

关键词： Holographic display CGH amplitude-only SLM 3D high contrast encoding algorithm

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A Seed Selection Method for LFSR Reseeding Based Test Data Compression

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Research Journal of Applied Sciences, Engineering and Technology 2016年第3期12卷 253-257页

作者： K.S. Neelukumari K.B. Jayanthi Department of Electronics and Communication Enginnering K.S. Rangasamy College of Technology Namakkal Tamilnadu India

Power dissipation is a significant problem as complexity of the circuit increases, which also increases during testing the VLSI circuits. So test data volume and test application time are major concerns for large industrial circuits. Test set selection is necessary to ensure that the most effective patterns are chosen from large test set in a high volume testing environment. LFSR reseeding forms the basis for many test compression solution, which increase the encoding efficiency of test compression based on LFSR. The most important criteria is to optimize the patterns generated for Built In Self-Test (BIST) which maximize the fault coverage and reduce the number of transition in the scan chains. Efficient techniques for test generations are essential in order to reduce the test generation time and size. In this study the output deviation method is used to select the effective test pattern from a large n-detect test set for test data compression scheme. The experiments are performed on ISCAS ?85 benchmark circuits.

关键词： BIST encoding algorithm Linear Feedback Shift Register (LFSR)

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Parallel algorithmic Optimization and Achievement for LDPC encoding and Decoding on CUDA Platform

Parallel Algorithmic Optimization and Achievement for LDPC E...

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International Conference on Computational Science and Computational Intelligence (CSCI)

作者： Liu Zhen Wang Yunpei Lu Lulu Jiangsu Univ Sci & Technol Sch Comp Sci & Engn Zhenjiang Peoples R China Jiangsu Univ Sci & Technol Sch Comp Sci & Engn Zhenjiang Peoples R China

ISBN: (纸本)9781467397957

With the development of mobile Internet applications, the fourth generation mobile communication (4G) has been widely used, low-density parity-check (LDPC) codes have gradually become the first choice for 4G communication because of its superior performance. For the short of traditional encoding and belief propagation (BP) decoding algorithm, this paper adopts a method of parallel processing for LDPC encoding and decoding which is finally realized on the mobile terminal. On the CUDA platform, CPU scheduling and GPU parallelization are used to process a large number of repeated operations so that parallel encoding algorithm and heterogeneous parallel BP algorithm are achieved and the efficiency is significantly improved.

关键词： LDPC codes encoding algorithm BP algorithm parallelization

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Efficient Lubytransform encodingalgorithm based on short cycle elimination

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Journal of Beijing Institute of Technology 2014年第3期23卷 407-412页

作者：曹聪哲费泽松匡镜明 School of Information and Electronics Beijing Institute of Technology

An effective Luby transform （LT） encoding algorithm based on short cycle elimination is proposed to improve decoding probabilities of short length LT codes. By searching the generator ma- trix, some special encoded symbols are generated by the encoder to effectively break the short cycles that have negative effect on the performance of LT codes. Analysis and numerical results show that by employing the proposed algorithm, the encoding complexity decreases and the decoding probabili- ties improve both in binary erasure channels （BECs） and additive white gauss noise （AWGN） chan- nels.

关键词： Luby transform （LT） codes short cycle encoding algorithm

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A Low Complexity-High Throughput QC-LDPC Encoder

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IEEE TRANSACTIONS ON SIGNAL PROCESSING 2014年第10期62卷 2696-2708页

作者： Mahdi, Ahmed Paliouras, Vassilis Univ Patras VLSI Design Lab Elect & Comp Engn Dept Patras 26500 Greece

This paper introduces hardware architectures for encoding Quasi-Cyclic Low-Density Parity Check (QC-LDPC) codes. The proposed encoders are based on appropriate factorization and subsequent compression of involved matrices by means of a novel technique, which exploits features of recursively-constructed QC-LDPC codes. The particular approach derives to linear encoding time complexity and requires a constant number of clock cycles for the computation of parity bits for all the constructed codes of various lengths that stem from a common base matrix. The proposed architectures are flexible, as they are parameterized and can support multiple code rates and codes of different lengths simply by appropriate initialization of memories and determination of data bus widths. Implementation results show that the proposed encoding technique is more efficient for some LDPC codes than previously proposed solutions. Both serial and parallel architectures are proposed. Hardware instantiations of the proposed serial encoders demonstrate high throughput with low area complexity for code words of many thousand bits, achieving area reduction compared to prior art. Furthermore, parallelization is shown to efficiently support multi-Gbps solutions at the cost of moderate area increase. The proposed encoders are shown to outperform the current state-of-the-art in terms of throughput-area-ratio and area-time complexity by 10 to up to 80 times for codes of comparable error-correction strength.

关键词： QC-LDPC codes encoding algorithm sparse matrix LU decomposition hardware LDPC encoder multi-Gbps encoders

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Representation of solutions in genetic VLSI placement algorithms 12

Representation of solutions in genetic VLSI placement algori...

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Proceedings of IEEE East West Design and Test Symposium ( EWDTS 2014)

作者： Zaporozhets, D. U. Zaruba, D. V. Kureichik, V. V. Southern Fed Univ Coll Automat & Comp Sci Rostov Na Donu Russia

ISBN: (纸本)9781479976300

The VLSI placement problem is presented in this article. A mechanism of representation of solutions for further genetic algorithm implementation is described. The proposed encoding algorithm is based on a placement tree and reverse Polish notation. The decoding algorithm is implemented in two stages: twinning of elements in macroblocks and calculation of real coordinates of elements. Experimental results show time-response characteristics of the proposed coding and decoding mechanisms. The time complexity of the encoding algorithm is represented by O(n) whereas the time complexity of the decoding algorithm is represented by O(n log n), where n is the number of elements.

关键词： VLSI computational complexity genetic algorithms integrated circuit design trees (mathematics) VLSI placement problem decoding algorithm encoding algorithm genetic algorithm implementation placement tree reverse Polish notation time complexity time-response characteristics algorithm design and analysis Biological cells Decoding Educational institutions encoding Genetic algorithms Very large scale integration Very large scale integration complexity classes Genetic algorithm (GA) decoding algorithm algorithm design and analysis cytology integrated circuit design Educational institutions DECODING RESPONSE CHARACTERISTICS

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