As the memory density increases for the big-data processing, the sensing speed is degraded because of the increased parasitic capacitive load. Thus, the equalization (EQ) scheme that is capable of improving the sensin...
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ISBN:
(纸本)9781509032198
As the memory density increases for the big-data processing, the sensing speed is degraded because of the increased parasitic capacitive load. Thus, the equalization (EQ) scheme that is capable of improving the sensing speed has now become essential. This paper examines the effectiveness of EQ scheme on the sensing speed of offset-canceling dual-stage sensing circuit (OCDS-SC) in terms of cells per bit line (CpBL). The simulation results show that the OCDS-SC with EQ scheme achieves 3 times faster sensing time than that without EQ scheme in case of CpBL of 128. Additionally, the EQ scheme becomes more effective for reducing the sensing time according to the increase in the number of CpBL.
Spectrally efficient frequency division multiplexing (SEFDM) is a bandwidth-compressed non- orthogonal multicarrier communication scheme, which provides improved spectral efficiency compared to orthogonal frequency di...
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Spectrally efficient frequency division multiplexing (SEFDM) is a bandwidth-compressed non- orthogonal multicarrier communication scheme, which provides improved spectral efficiency compared to orthogonal frequency division multiplexing (OFDM) system. The loss of orthogonality yields the self-introduced intercarrier interference (ICI) complicating the equalizer design. In this work, a deep learning (DL)-based SEFDM equalization scheme is proposed to characterize the ICI and to detect the transmitted information bits. The DL-based equalization scheme is trained offline using randomly-generated data and then deployed online. The performance of the equalization scheme is tested by extensive numerical simulations. The results show that the proposed equalization scheme outperforms the linear equalization based equalization scheme, such as zero forcing (ZF), minimum mean squared error (MMSE) and truncated singular value decomposition (TSVD), under additive white Gaussian noise (AWGN) channel in terms of the bit-error rate (BER). Especially for BPSK, the uncoded BER performance approaches the traditional OFDM even for the compression ratio of 0.7, which saves the bandwidth by 30%.
Series battery equalization can improve battery charge and discharge reliability and extend battery life. It requires a higher requirement in battery management system (BMS). This paper introduces the high speed induc...
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ISBN:
(纸本)9781509012107
Series battery equalization can improve battery charge and discharge reliability and extend battery life. It requires a higher requirement in battery management system (BMS). This paper introduces the high speed inductor-based battery equalization schemes. It can realize energy transfer between the cells and batteries by charging and discharging of the inductors. Thus the equalization time can be improved. Finally the simulation and experimental results verify the theoretical analysis.
We propose and demonstrate a 64-Gbit/s four-level pulse-amplitude-modulation transmission by using a limited modulation bandwidth silicon microring modulator (SiMRM) and the Volterra equalization scheme. Severe inters...
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We propose and demonstrate a 64-Gbit/s four-level pulse-amplitude-modulation transmission by using a limited modulation bandwidth silicon microring modulator (SiMRM) and the Volterra equalization scheme. Severe intersymbol interference caused by both the chromatic dispersion of the optical fiber and the bandwidth limitation of components can be compensated. Besides, several equalization schemes are compared and analyzed in terms of performance and complexity. In addition, the design and characteristics of the SiMRM used in the experiment are also discussed.
The integer-forcing receiver architecture has recently been proposed as a high-performance, yet low-complexity, equalization scheme, that is applicable when all data streams are encoded with the same linear code. It w...
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ISBN:
(纸本)9781479959990
The integer-forcing receiver architecture has recently been proposed as a high-performance, yet low-complexity, equalization scheme, that is applicable when all data streams are encoded with the same linear code. It was further shown in [1], that this receiver architecture, when coupled with spacetime linear precoding is able to achieve the capacity of the openloop multiple-input multiple-output channel, up to a constant gap that depends only on the number of transmit antennas. The gap, however, is quite large and thus provides performance guarantees that are useful only for high values of capacity. In this work, we consider the problem of multicast over multiple-input multipleoutput channels to a modest number of users, and with space-only linear precoding. It is assumed that channel state information is available to the transmitter, allowing it to optimize the precoding matrix so as to maximize the achievable transmission rate. It is numerically demonstrated that this architecture allows to very closely approach the multicast capacity at all transmission rates regimes.
A complete detection, channel estimation, synchronization, and equalization scheme for a transmitted reference (TR) ultra-wideband (UWB) system is proposed in this paper. The scheme is based on a data model which admi...
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A complete detection, channel estimation, synchronization, and equalization scheme for a transmitted reference (TR) ultra-wideband (UWB) system is proposed in this paper. The scheme is based on a data model which admits a moderate data rate and takes both the interframe interference (IFI) and the intersymbol interference (ISI) into consideration. Moreover, the bias caused by the interpulse interference (IPI) in one frame is also taken into account. Based on the analysis of the stochastic properties of the received signals, several detectors are studied and evaluated. Furthermore, a data-aided two-stage synchronization strategy is proposed, which obtains sample-level timing in the range of one symbol at the first stage and then pursues symbol-level synchronization by looking for the header at the second stage. Three channel estimators are derived to achieve joint channel and timing estimates for the first stage, namely, the linear minimum mean square error (LMMSE) estimator, the least squares (LS) estimator, and the matched filter (MF). We check the performance of different combinations of channel estimation and equalization schemes and try to find the best combination, that is, the one providing a good tradeoff between complexity and performance. Copyright (C) 2009 YiyinWang et al.
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