In this paper, a robust error control coding scheme ispresented. The scheme is a cascaded FEC scheme supported by parityretransmissionsfor furthererrorcorrection in the erroneous data words.The error performance and t...
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In this paper, a robust error control coding scheme is
presented. The scheme is a cascaded FEC scheme supported by parity
retransmissionsfor furthererrorcorrection in the erroneous data words.
The error performance and throughput efficiency of the scheme are
analyzed. Two specific schemes are studied. We show that both schemes
provide high reliability and throughput efficiency even for high channel
bitsrror rates in the range of 10 -*. The schemes are suitable for high
data rate file transfer.
The rapid revolution of mobile communication technology provides a great avenue for efficient information transmission to facilitate digital multimedia services. In current 5G systems, broadcasting technology is used ...
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The rapid revolution of mobile communication technology provides a great avenue for efficient information transmission to facilitate digital multimedia services. In current 5G systems, broadcasting technology is used to improve the efficiency of information transmission, and polar codes are adopted to improve data transmission reliability. Reducing the decoding latency of polar codes is of great importance for ultra-low-latency and reliable data transmission for 5G broadcasting, which still remains a challenge in digital broadcasting services. In this paper, we propose an aggregation method to construct constituent codes for reducing the decoding latency of polar codes. The aggregation method jointly exploits the structure and reliability of constituent codes to increase the lengths of constituent codes that can be decoded in parallel, thus significantly reducing the decoding latency. Furthermore, an efficient parallel decoding algorithm is integrated with the proposed aggregation method to efficiently decode the reliable constituent codes without sacrificing error-correction performance. Simulation results show that the proposed method significantly reduces the decoding latency as compared to the existing state-of-the-art schemes.
The selection of interleaver depth for the land-mobile satellite channel is investigated by analyzing the performance of convolutionally encoded BPSK and DPSK over a frequency-nonselective correlated Ricean fading cha...
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The selection of interleaver depth for the land-mobile satellite channel is investigated by analyzing the performance of convolutionally encoded BPSK and DPSK over a frequency-nonselective correlated Ricean fading channel. By extending previous analyses of partially interleaved convolutional codes over such channels, a new figure of merit-which is a function of the channel correlation function-is identified. Simulation results for the first-order Butterworth, Jakes, and Divsalar fading spectra are presented which demonstrate the applicability of the figure of merit as an aid in interleaver design. The figure of merit also tracks the nonmonotonic, or quasi-oscillatory, behavior of the decoded bit error rate with increasing interleaver depths in those situations where this occurs.
Energy efficient reliable communication is a major challenge for resource constrained wireless sensor networks (WSNs). This paper evaluates the end-to-end performance of a CDMA-based static multi-hop WSN with layered ...
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Energy efficient reliable communication is a major challenge for resource constrained wireless sensor networks (WSNs). This paper evaluates the end-to-end performance of a CDMA-based static multi-hop WSN with layered architecture in shadowed environment. Two popular information delivery mechanisms with errorcontrol are considered. End-to-end error correction and control using HARQ-type I with Bose Chaudhuri Hocquenghem (BCH) coding is considered, where BCH decoding is used only at the sink which has enough power to run the complex decoding algorithm. Performance of the network system using hop by hop ARQ mechanism at every intermediate node is also compared with that of end-to-end errorcontrol scheme. An interference model for multi-hop is presented considering correlation amongst shadow faded interferers. Energy requirement, and delay for successful delivery of a data packet from a source to sink is evaluated for each packet transmission scheme considering a suitable energy model and compared under several conditions of node density, packet length, number of hops between source and sink. Further energy efficiency for each scheme is evaluated and compared. Analytical results are supported by simulation.
We consider the problem of finding the smallest or largest entry of a tensor of order $N$ that is specified via its rank decomposition. Stated in a different way, we are given $N$ sets of $R$-dimensional vectors and w...
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We consider the problem of finding the smallest or largest entry of a tensor of order $N$ that is specified via its rank decomposition. Stated in a different way, we are given $N$ sets of $R$-dimensional vectors and we wish to select one vector from each set such that the sum of the Hadamard product of the selected vectors is minimized or maximized. We show that this fundamental tensor problem is NP-hard for any tensor rank higher than one, and polynomial-time solvable in the rank-one case. We also propose a continuous relaxation and prove that it is tight for any rank. For low-enough ranks, the proposed continuous reformulation is amenable to low-complexity gradient-based optimization, and we propose a suite of gradient-based optimization algorithms drawing from projected gradient descent, Frank-Wolfe, or explicit parametrization of the relaxed constraints. We also show that our core results remain valid no matter what kind of polyadic tensor model is used to represent the tensor of interest, including Tucker, HOSVD/MLSVD, tensor train, or tensor ring. Next, we consider the class of problems that can be posed as special instances of the problem of interest. We show that this class includes the partition problem (and thus all NP-complete problems via polynomial-time transformation), integer least squares, integer linear programming, integer quadratic programming, sign retrieval (a special kind of mixed integer programming / restricted version of phase retrieval), and maximum likelihood decoding of parity check codes. We demonstrate promising experimental results on a number of hard problems, including state-of-art performance in decoding low density parity check codes and general parity check codes.
Large-scale continuous media (CM) system implementations require scalable servers most likely built from clusters of storage nodes. Across such nodes, random data placement is an attractive alternative to the traditio...
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Large-scale continuous media (CM) system implementations require scalable servers most likely built from clusters of storage nodes. Across such nodes, random data placement is an attractive alternative to the traditional round-robin striping. One benefit of random placement is that additional nodes can be added with low data-redistribution overhead such that the system remains load balanced. One of the challenges in this environment is the implementation of a retransmission-based errorcontrol (RBEC) technique. Because data is randomly placed, a client may not know which server node to ask for a lost packet retransmission. We design and implement three RBEC techniques that utilize the benefits of random data placement in a cluster server environment while enabling a client to efficiently identify the correct server node for lost packet requests. We implement and evaluate our techniques with a one-, two-, four-, and eight-way server cluster and across local and wide-area networks. Our results show the feasibility and effectiveness of our approaches in a real-world environment and also identify one solution as generally superior to the other two. 2005 SPIE and IS&T.
In this paper, receiver design and performance analysis for coded asynchronous code-division multiple access (CDMA) systems is considered. The receiver front-end consists of the near-far resistant multiuser detector k...
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In this paper, receiver design and performance analysis for coded asynchronous code-division multiple access (CDMA) systems is considered. The receiver front-end consists of the near-far resistant multiuser detector known as the projection receiver (PR), The PR performs multiple-access interference resolution and is followed by error-control decoding. The output of the projection receiver yields the appropriate metric (i.e., soft information) for decoding of the coded sequences, An expression for the metric is derived that allows the use of a standard sequence decoder (e.g., Viterbi algorithm, M-algorithm) for the error-control code. It is then shown that the metric computer has an elegant adaptive implementation based on an extension of the familiar recursive least squares (RLS) algorithm. The adaptive PR operates on a single sample per chip and achieves a performance virtually identical to the algebraic PR, but with significantly less complexity. The receiver performance is studied for CDMA systems,vith fixed and random spreading sequences, and theoretical performance degradations with regard to the single-user bound are derived. The near-far resistance of the PR is also proven, and demonstrated by simulation.
All-optical packet switched networking is hampered by the problem of realizing viable queues for optical packets. Packets can be buffered in delay lines, but delay lines do not functionally emulate queues from an inpu...
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All-optical packet switched networking is hampered by the problem of realizing viable queues for optical packets. Packets can be buffered in delay lines, but delay lines do not functionally emulate queues from an input-output point of view. In this paper we consider the problem of exact emulation of a priority queue of size K using a switching system comprised of a switch of size (M + 1) x (M + 1), which has one distinguished input for external arrivals, one distinguished output for external departures, and fixed-length delay lines of lengths L-1, L-2, ..., L-M connecting the other inputs and outputs in pairs. We measure the complexity of such an emulation by M + 1. We prove that M >= [log(K - 1)] and present a construction Sigma(M)(m=1) L-m = K = O(root K). We also sketch an idea for an all-optical packet switched communication network architecture based on approximate emulation of priority queues of finite size using switches and delay lines, with erasure controlcoding at the packet level.
This correspondence analyzes the bit-error rate (BER) performance of coded synchronous code-division multiple-access (CDMA) systems assuming perfect channel state information (CSI) and optimal joint multiuser detectio...
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This correspondence analyzes the bit-error rate (BER) performance of coded synchronous code-division multiple-access (CDMA) systems assuming perfect channel state information (CSI) and optimal joint multiuser detection/decoding (OJMUDD). Our analysis is conducted in the same framework as that of uncoded systems. First, we derive the precise probability of an error event, then we provide an upper bound on the BER based on the sum of pairwise error probabilities, and, finally, we tighten the upper bound by considering decomposable error events. Many new concepts unique to coded systems are introduced. We propose to use quasi parity checks for identifying permissible error events, introduce the concept of compatible probability of error matrices, extend the list of conditions for identifying decomposable error events, and introduce the concept of conjugate sets to explore the symmetry among indecomposable error events. Simulation results are given along with theoretical predictions.
Most of the recently proposed hardware realizations for non-binary low-density parity-check decoders are ASIC oriented as they employ multiplierless computation units. In this article, we present a different decoder d...
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Most of the recently proposed hardware realizations for non-binary low-density parity-check decoders are ASIC oriented as they employ multiplierless computation units. In this article, we present a different decoder design approach that is specifically intended for an FPGA implementation. We reformulate the mixed-domain FFT-BP decoding algorithm and develop a decoder architecture that does not exclude the multiplication units. This allows mapping a part of the algorithm to the multiplier cores embedded in an FPGA, thus making use of all the types of FPGA resources. Then, the throughput limit achievable in a single FPGA by the proposed decoder is significantly increased. We also consider another important optimization of the decoder implementation, mainly an efficient realization of the permutation units and an approximated evaluation of the nonlinear functions of messages. Another motivation is to make the decoder easily scalable for FPGA devices of different sizes. To achieve this goal, the configurable semi-parallel decoder architecture is applied operating for the structured subclass of codes.
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