A combination of redundant circuits and error-correcting-code circuits have been implemented on a 16-Mbit memory chip. The combination of these circuits results in a synergistic fault-tolerance scheme that makes this ...
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A combination of redundant circuits and error-correcting-code circuits have been implemented on a 16-Mbit memory chip. The combination of these circuits results in a synergistic fault-tolerance scheme that makes this chip immune to a high level of manufacturing & reliability defects. Experiments have been performed with highly defective chips to test the error-correction capability of this chip and to determine models for the tradeoff between manufacturing yields and reliability. Additional experiments have been done with accelerated protons to investigate the soft-error sensitivity of this chip. Results show no soft-error reliability failures, including those caused by cosmic-particle radiation. Negative binomial distributions were used to evaluate the experiments. The correlation between manufacturing-faults and stress-failures were modeled with a bivariate negative-binomial distribution.
In this correspondence, we use a symplectic geometry over the binary field to discuss the equivalence of additive codes over the quaternary field and the equivalence of additive quantum codes. We establish the existen...
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In this correspondence, we use a symplectic geometry over the binary field to discuss the equivalence of additive codes over the quaternary field and the equivalence of additive quantum codes. We establish the existence of a standard form of the stabilizer and the normalizer matrices for additive quantum codes. Thus, we present the quantum analogue of standard forms of generator and parity check matrices for systematic linear codes in classical coding theory for additive quantum codes.
Switching is a local transformation of a combinatorial structure that does not alter the main parameters. Switching of binary covering codes is studied here. In particular, the well-known transformation of error-corre...
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Switching is a local transformation of a combinatorial structure that does not alter the main parameters. Switching of binary covering codes is studied here. In particular, the well-known transformation of error-correcting codes by adding a parity-check bit and deleting one coordinate is applied to covering codes. Such a transformation is termed a semiflip, and finite products of semiflips are semiautomorphisms. It is shown that for each code length n >= 3, the semiautomorphisms are exactly the bijections that preserve the set of r-balls for each radius r. Switching of optimal codes of size at most 7 and of codes attaining K(8, 1) = 32 is further investigated, and semiautomorphism classes of these codes are found. The paper ends with an application of semiautomorphisms to the theory of normality of covering codes. (C) 2017 Elsevier B.V. All rights reserved.
One unknown element of an n-element set is sought by asking if it is contained in given subsets. It is supposed that the question sets are of size at most k and all the questions are decided in advance, the choice of ...
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One unknown element of an n-element set is sought by asking if it is contained in given subsets. It is supposed that the question sets are of size at most k and all the questions are decided in advance, the choice of the next question cannot depend on previous answers. At most I of the answers can be incorrect. The minimum number of such questions is determined when the order of magnitude of k is n(alpha) with alpha < 1. The problem can be formulated as determination of the maximum sized l-error-correcting code (of length n) in which the number of ones in a given position is at most k. (C) 2002 Elsevier Science B.V. All rights reserved.
Reliability is a major concern in the design of large disk arrays. In this paper, we examine the effect of encountering more failures than that for which the RAID array was initially designed. Erasure codes are incorp...
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Reliability is a major concern in the design of large disk arrays. In this paper, we examine the effect of encountering more failures than that for which the RAID array was initially designed. Erasure codes are incorporated to enable system recovery from a specified number of disk erasures, and strive beyond that threshold to recover the system as frequently, and as thoroughly, as is possible. Erasure codes for tolerating two disk failures are examined. For these double erasure codes, we establish a correspondence between system operation and acyclicity of its graph model. For the most compact double erasure code, the full 2-code, this underlies an efficient algorithm for the computation of system operation probability (all disks operating or recoverable). When the system has failed, some disks are nonetheless recoverable. We extend the graph model to determine the probability that d disks have failed, a of which are recoverable by solving one linear equation, b of which are further recoverable by solving systems of linear equations, and d - a - b of which cannot be recovered. These statistics are efficiently calculated for the full 2-code by developing a three variable ordinary generating function whose coefficients give the specified values. Finally, examples are given to illustrate the probability that an individual disk can be recovered, even when the system is in a failed state. (C) 2006 Elsevier B.V. All rights reserved.
The number of columns in of a two-level supersaturated design is at least as large as its run size n, that is n less than or equal to in. In this case, orthogonality among the columns of a design has to be sacrificed....
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The number of columns in of a two-level supersaturated design is at least as large as its run size n, that is n less than or equal to in. In this case, orthogonality among the columns of a design has to be sacrificed. One measure of non-orthogonality among the columns of a supersaturated design is given by max(i error-correcting code. Another bound can be derived from lower bounds on the E(s(2))-criterion which is defined as Sigma (i
There are some quantum private comparison (QPC) schemes proposed previously. In this paper we study these QPC protocols in non-ideal scenario and find that they are not secure there. For resolving the problem, we prop...
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There are some quantum private comparison (QPC) schemes proposed previously. In this paper we study these QPC protocols in non-ideal scenario and find that they are not secure there. For resolving the problem, we propose a QPC scheme which could be performed in practical scenario. By the use of Greenberger-Horne-Zeilinger (GHZ) states and error-correcting code (ECC), the scheme has the capability of fault-tolerate.
In this paper, we propose a scheme for quantum private comparison using phase encoding. The analysis indicates that the scheme is secure, and can prevent some familiar attacks. With the use of error-correcting code (E...
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In this paper, we propose a scheme for quantum private comparison using phase encoding. The analysis indicates that the scheme is secure, and can prevent some familiar attacks. With the use of error-correcting code (ECC), it achieves a limited fault tolerant quantum private comparison. The scheme is easy to be realized in current experiments.
Estimates are made of the hardware costs and functional reliability of a structural model for a fault-tolerant memory for computerized measuring instruments, which realizes an error-correcting code providing correctio...
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Estimates are made of the hardware costs and functional reliability of a structural model for a fault-tolerant memory for computerized measuring instruments, which realizes an error-correcting code providing correction of errors of a given multiplicity and the detection of the maximum number of uncorrectable errors.
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