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检索条件"主题词=error-correcting code"

共 179 条记录，以下是131-140 订阅

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A 400Mb/s Radix-4 MAP decoder with fast recursion architecture

A 400Mb/s Radix-4 MAP decoder with fast recursion architectu...

引用

10th International Conference on Advanced Communication Technology

作者： Zhang, Cheng Wang, Xuejing Ye, Fan Ren, Junyan Fudan Univ State Key Lab ASIC & Syst Shanghai Peoples R China

ISBN: (纸本)9788955191356

Turbo decoder's throughput is highly restricted by the recursion architecture of MAP decoder. In this paper, a new architecture of MAP decoder is presented. We improve the recursion architecture of the traditional Radix-4 MAP decoder in order to gain higher throughput, meanwhile the modification could reduce the coding gain loss caused by the approximation of the traditional architecture. A new data flow of the Radix-4 MAP decoder is also adopted to reduce the memory access. The proposed architecture could increase The throughput by 21%, while its hardware complexity increase is negligible.

关键词： error-correcting code turbo code MAP algorithm high throughput

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Investigation of Read Disturb error in 1Ynm NAND Flash Memories for System Level Solution

Investigation of Read Disturb Error in 1Ynm NAND Flash Memor...

引用

IEEE International Reliability Physics Symposium (IRPS)

作者： Kobayashi, Atsuro Watanabe, Hikaru Sakaki, Yukiya Aritome, Seiichi Takeuchi, Ken Chuo Univ Dept Elect Elect & Commun Engn Tokyo Japan

ISBN: (纸本)9781509066414

Read-disturb characteristics in 1Ynm NAND flash memories have been investigated. The error regularity among word-lines is observed in 1Ynm (2nd generation below 20nm) triple-level cell (TLC) NAND flash. Consequently, unreliable page which exceeds error-correcting code (ECC) capability is occurred. To optimize ECC capability, system level solution with Bose-Chaudhuri-Hocquenghem (BCH) ECC is introduced. By adding parity bit to the unreliable pages for ECC calculation, a correctable bit-error rate (BER) can be increased by 1.3-times.

关键词： error-correcting code NAND flash memory read-disturb error Solid-State Drive

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Improved DWT-SVD-Based Medical Image Watermarking Through Hamming code and Chaotic Encryption

Improved DWT-SVD-Based Medical Image Watermarking Through Ha...

引用

International Conference on VLSI, Communications, and Signal Processing (VCAS)

作者： Thakur, S. Singh, A. K. Kumar, Basant Ghrera, S. P. JUIT Dept CSE Solan HP India NIT Patna Dept CSE Patna Bihar India MNNIT Allahabad Dept ECE Allahabad Uttar Pradesh India

ISBN: (纸本)9789813297753;9789813297746

This paper presents an efficient watermarking technique to enhance the performance of DWT-SVD-based approach. The method uses well-known error-correcting code (ECC) and chaotic encryption to reduce the channel noise distortion and improve the security of the technique, respectively. In the proposed method, the cover image is transformed by DWT and the sub-bands are selected for embedding the watermarks. Subsequently, the selected sub-bands are further transformed by SVD. The more robust watermark "patient report" and less robust watermark "patient medical image" is embedded into singular values of the selected DWT sub-bands. The use of transform domain techniques along with hamming code ensures that the approach offers more robustness and reliability. Inclusion of chaos-based encryption carries twofold benefits such as obscuring the watermarked content and strengthening the overall security of the projected scheme. The proposed technique offers a significant value of peak signal-to-noise ratio (PSNR), normalized correlation (NC), bit error rate (BER), number of pixel change rate (NPCR), and unified average changing intensity (UCAI) in presence of major attacks. The performance comparisons of our technique with a similar approach show that the proposed technique is superior for nine considered attacks.

关键词： DWT SVD Image watermarking error-correcting code Chaotic encryption PSNR NC BER NPCR UACI

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Application of Parallel Computing Technology OpenMP to Search for the Generator Polynomials

Application of Parallel Computing Technology OpenMP to Searc...

引用

International Conference on Mechanical Engineering, Automation and Control Systems (MEACS)

作者： Mytsko, Evgeniy A. Malchukov, Andrey N. FSAEI HE NR Tomsk Polytech Univ Dept Comp Engn Tomsk Russia

ISBN: (纸本)9781479962211

The paper deals with the application of parallel computing technology OpenMP to search for the generator polynomials. Forming the task of finding polynomials to create polynomial block codes is quite laborious. For example for generator polynomial, on which basis the fail-safe code (m = 32, t = 3), you need two weeks of continuous work program on the processor Intel XEON 5150 with a core clock of 2.66 GHz and RAM 1 GB. The article describes the search algorithm forming polynomials, which are constructed on the basis of codes more efficient than Bose-Chaudhuri-Hocquenghem codes. The article describes the ability to form the polynomials and analyzed in terms of the possibility of using parallel computing technology OpenMP. Computer experiment was delivered to compare the performance of software implementations with and without the OpenMP. Results supplied by the computer experiment to study the performance of sequential and parallelized implementations of the search algorithm polynomials showed that the usage of OpenMP technology allows under certain input parameters (m = 9, t = 2) to increase the speed of 20-24 times. On average, using of OpenMP algorithm enhances performance up to 3 times.

关键词： generator polynomial parallel computing search algorithm Hamming distance threads error-correcting code

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A Solution for Reducing Redistribution Costs of HAIL

A Solution for Reducing Redistribution Costs of HAIL

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12th KIPS International Conference on Ubiquitous Information Technologies and Applications (CUTE) / 9th International Conference on Computer Science and its Applications (CSA)

作者： Kim, Taehyuk Lee, Minseok Choi, Doo Ho Youn, Taek-Young Univ Sci & Technol Dept Informat Secur Engn Daejeon South Korea ETRI Daejeon South Korea

ISBN: (纸本)9789811076053;9789811076046

The Proof of Retrievability (PoR) is a useful tool for securing data by monitoring the retrievability of a file stored in remote servers. But they are not secure if the full data stored in the storage server is attacked. HAIL has been proposed to solve this problem. It enables a client to verify that files stored in independent storage servers are intact and retrievable. If some servers are attacked, a client can reconstruct the original data using the data stored in remaining servers. Unfortunately, in HAIL, expensive redistribution costs occur if we need to reconstruct the original data, which was not considered in existing works. In this paper, we propose a solution for reducing redistribution costs by grouping file segments and applying HAIL to each group. It is unnecessary for clients to download all files in all servers when some files stored in a specific server are corrupted. Finally, we analyze the performance of our scheme.

关键词： HAIL error-correcting code PORs Cloud storage service

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Rethinking Algorithm-Based Fault Tolerance with a Cooperative Software-Hardware Approach 13

Rethinking Algorithm-Based Fault Tolerance with a Cooperativ...

引用

International Conference for High Performance Computing, Networking, Storage and Analysis (SC)

作者： Li, Dong Chen, Zizhong Wu, Panruo Vetter, Jeffrey S. Oak Ridge Natl Lab Oak Ridge TN 37831 USA Univ Calif Riverside Riverside CA 92521 USA Georgia Inst Technol Atlanta GA 30332 USA

ISBN: (纸本)9781450323789

Algorithm-based fault tolerance (ABFT) is a highly efficient resilience solution for many widely-used scientific computing kernels. However, in the context of the resilience ecosystem, ABFT is completely opaque to any underlying hardware resilience mechanisms. As a result, some data structures are over-protected by ABFT and hardware, which leads to redundant costs in terms of performance and energy. In this paper, we rethink ABFT using an integrated view including both software and hardware with the goal of improving performance and energy efficiency of ABFT-enabled applications. In particular, we study how to coordinate ABFT and error-correcting code (ECC) for main memory, and investigate the impact of this coordination on performance, energy, and resilience for ABFT-enabled applications. Scaling tests and analysis indicate that our approach saves up to 25% for system energy (and up to 40% for dynamic memory energy) with up to 18% performance improvement over traditional approaches of ABFT with ECC.

关键词： algorithm-based fault tolerance error-correcting code adaptive resilience

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Fast Decoder of BCH code with Cyclic Decoding Method

Fast Decoder of BCH Code with Cyclic Decoding Method

引用

International Siberian Conference on Control and Communications (SIBCON)

作者： Mytsko, E. Malchukov, A. Novogilov, I. Kim, V. FSAEI HE NR Tomsk Polytech Univ Dept Comp Engn Tomsk Russia

Fast decoder of BCH code (31, 16, 7) which based on matrix algorithm of syndromes computation and parallel data processing was developed. Functional blocks of developed device based on block- based design were describ... 详细信息

ISBN: (纸本)9781467383837

关键词： BCH code codec fast decoder cyclic method error-correcting code block-based design

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Adaptive error Correction Coding Scheme for Computations in the Noisy Min-Sum Decoder

Adaptive Error Correction Coding Scheme for Computations in ...

引用

IEEE International Symposium on Information Theory (ISIT)

作者： Huang, Chu-Hsiang Li, Yao Dolecek, Lara Univ Calif Los Angeles Dept Elect Engn Los Angeles CA 90024 USA Akamai Technol Inc Pasadena CA USA

ISBN: (纸本)9781467377041

With scaling of process technologies and increase in process variations, embedded memories will be inherently unreliable. In this paper, we propose redundancy-free adaptive error-correcting codes for the noisy min-sum decoder subject to memory errors. We consider the popular memory error model with a binary symmetric channel We first revisit the density evolution analysis proposed by Balatsoukas-Stimming and Burg 14 the noisy min-sum decoder. Two important consequences of the density evolution analysis are: (a) after a large enough number of iterations, most of the messages have large magnitudes, and the residual errors are mostly from the sign bit flips due to memory failures, and (b) errors in the least significant bits in large magnitude messages have a negligible effect on the residual error rate. We thus propose adaptive error-correcting codes to protect sign hits by least significant bits when the messages have large magnitudes. The proposed coding scheme does not require any further data storage (i.e., this code is redundancy-free). Density evolution analysis for the noisy min-sum decoder implementing the proposed coding scheme is derived, demonstrating that the proposed decoder achieves a residual error rate that is on the order of the square of the residual error rate achieved by the nominal min-sum decoder. Simulation results on the finite block length LDPC code also agree with this density evolution analysis.

关键词： Fault-tolerant computing iterative decoders error-correcting code variability-aware computing

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Multicarrier error Correction using T-codes

Multicarrier Error Correction using T-codes

引用

IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (PACRIM)

作者： Speidel, Ulrich Gulliver, T. Aaron Shongwe, Thokozani Univ Auckland Dept Comp Sci Private Bag 92019 Auckland 1 New Zealand Univ Victoria Dept Elect & Comp Engn Victoria BC V8W 3P6 Canada Univ Johannesburg Dept Elect & Elect Engn Johannesburg South Africa

ISBN: (纸本)9781457702518

This paper considers a multicarrier communication system with n subchannels, each of which may be subject to insertion, deletion or inversion errors. A (variable-length) T-code is employed on each subchannel with two constraints: transmission of codewords starts simultaneously on all subchannels, and the codeword length l is the same for all subchannels, i.e., codewords of different lengths may be used for each transmission in the time domain, but not in the frequency domain. This allows for the construction of an (n, K, d) error-correcting code over F-Q, where Q <= m(l), and m(l) is the number of codewords of length l in the T-code.

关键词： Decoding Encoding error correction Receivers Reed-Solomon codes Synchronization codeword length error correction codes error-correcting code multicarrier communication system multicarrier error correction time domain time-domain analysis variable-length T-code

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A generalization of the parallel error correcting codes by allowing some random errors

A generalization of the parallel error correcting codes by a...

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29th Symposium on Information Theory and Its Applications (SITA2006)

作者： Yagi, Hideki Matsushima, Toshiyasu Hirasawa, Shigeichi Waseda Univ Media Network Ctr Tokyo 1698005 Japan Waseda Univ Sch Fundamental Sci & Engn Tokyo 1698555 Japan Waseda Univ Sch Creat Sci & Engn Tokyo 1698555 Japan

This paper generalizes parallel error correcting codes proposed by Ahlswede et al. over a new type of multiple access channel called parallel error channel. The generalized parallel error correcting codes can handle with more errors compared with the original ones. We show construction methods of independent and non-independent parallel error correcting codes and decoding methods. We derive some bounds about the size of respective parallel error correcting codes. The obtained results imply a single parallel error correcting code can be constructed by two or more kinds of error correcting codes with distinct error correcting capabilities.

关键词： multiple access channel parallel channel code construction error-correcting code linear block code

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