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检索条件"主题词=error-correcting code"
179 条 记 录,以下是171-180 订阅
排序:
AACI: The Mechanism for Approximate Authentication and Correction of Images
AACI: The Mechanism for Approximate Authentication and Corre...
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IEEE International Conference on Communications Workshops
作者: S. Amir Hossein A. E. Tabatabaei Obaid Ur-Rehman Natasa Zivic Chair for Digital Communications Systems of University of Siegen
Modification of images usually originates from channel noise, image processing operations or adversary's efforts. Image authentication mechanisms protect the authenticity of images by differentiating between the e... 详细信息
来源: 评论
A Kind of Performance Improvement of Hamming code
A Kind of Performance Improvement of Hamming Code
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The 2011 International Conference on Computing,Information and Control(ICCIC 2011)
作者: Hongli Wang Department of Mathematical and Information Sciences Tangshan Teacher's College
Hamming code is a parity code, the information bits and test bits must be mixed arrangement at a fixed location to check for errors s and correct the wrong. Based on the design principle of Hamming codes, this paper g... 详细信息
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A Note on Relationship between Algebraic Geometric codes and LDPC codes
A Note on Relationship between Algebraic Geometric Codes and...
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2010 2nd International Conference on Signal Processing System(2010年信号处理系统国际会议 ICSPS 2010)
作者: Wanbao Hu Huaping Cai Yanxia Wu Zhen Wang Department of Mathematics Anqing teachers college Anqing China
Low-density parity-check (LDPC) codes constructed by a sparse parity-check matrix are of very fast encoding and decoding algorithms. Another kind of codes, which improved the well-known Gilbert-Varshamov bound, a... 详细信息
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Fast Decoder of BCH code with Cyclic Decoding Method
Fast Decoder of BCH Code with Cyclic Decoding Method
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International Siberian Conference on Control and Communications
作者: E. Mytsko A. Malchukov I. Novogilov V. Kim Department of Computer Engineering FSAEI HE NR Tomsk Polytechnic University Tomsk Russia
Fast decoder of BCH code (31, 16, 7) which based on matrix algorithm of syndromes computation and parallel data processing was developed. Functional blocks of developed device based on block-based design were describe... 详细信息
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Structure Development of the BCH code High-speed Decoder Based on the Cyclic Decoding Method
Structure Development of the BCH Code High-speed Decoder Bas...
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2015 International Conference on Applied Mechanics and Mechatronics Engineering(AMME 2015)
作者: Evgeniy A.MYTSKO Andrey N.MALCHUKOV Svetlana E.RYZHOVA Valeriy L.KIM Computer Engineering Department Institute of Cybernetics Tomsk Polytechnic University
The structure of the BCH code decoder based on the cyclic decoding method with classic and fast dividing polynomials algorithms was presented. A comparison of algorithms was provided, the conclusion about hardware cos... 详细信息
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Collaborative Defense Against Data Injection Attack in IEC61850 Based Smart Substations
Collaborative Defense Against Data Injection Attack in IEC61...
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IEEE Power and Energy Society General Meeting
作者: Richard Macwan Christopher Drew Prosper Panumpabi Alfonso Valdes Nitin Vaidya Pete Sauer Dmitry Ishchenko Information Trust Institute University of Illinois at Urbana Champaign ABB US Corporate Research Center
As the power distribution grid moves towards actualizing the concept of a smart grid, the dependence of reliable and secure grid operation on the communication architecture and data is increasing rapidly, along with t... 详细信息
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Low-power multi-standard Viterbi decoder for wireless communication applications
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International Journal of Electronics Letters 2016年 第2期4卷 228-238页
作者: Yu, Chu Lin, Bor-Shing Cheng, Po-Hsun Su, Yu-Shan Department of Electronic Engineering National ILan University Yilan Taiwan Department of Computer Science and Information Engineering National Taipei University Taipei Taiwan Department of Software Engineering National Kaohsiung Normal University Kaohsiung Taiwan
A Viterbi code is a type of the well-known error correcting code (ECC), which provides a robust error control methodology for wireless communication systems. It can efficiently reduce the bit error rate of the receive... 详细信息
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ECC-ASPIRIN: An ECC-Assisted Post-Package Repair Scheme for Aging errors in DRAMs
ECC-ASPIRIN: An ECC-Assisted Post-Package Repair Scheme for ...
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IEEE VLSI Test Symposium
作者: Dae-Hyun Kim Linda S. Milor Georgia Institute of Technology
Because of continuous scaling down to small dimensions, DRAM has become a main memory with high capacity and density. Because denser memories are likely to contain more errors, DRAM employs repair schemes that replace... 详细信息
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Trick play method for digital VCRs
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Electronics and Communications in Japan (Part III: Fundamental Electronic Science) 1998年 第12期80卷
作者: Ken Onishi Junko Ishimoto Tohru Inoue Sadayuki Inoue Makoto Kumano Hiro Takano Imaging Systems Laboratory Mitsubishi Electric Corporation Nagaokakyo Japan 617
In digital VCRs for home use, the video signal for each field is recorded on multiple tracks. Thus, it is difficult to reproduce the video signal smoothly in high-speed trick playback, where the signal is restored by ... 详细信息
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