检索结果-内蒙古大学图书馆

error-detecting codes and fault-containing self-stabilization

INFORMATION PROCESSING LETTERS 2000年第1-2期73卷 41-46页

作者： Herman, T Pemmaraju, S Univ Iowa Dept Comp Sci Iowa City IA 52242 USA Indian Inst Technol Bombay Maharashtra India

Self-stabilizing algorithms recover from all cases of transient failure, but the mechanism of self-stabilization may be costly for mild cases of transient failure. error-detecting codes can be used to identify, with high probability, transient faults in data. This note investigates how error-detecting codes can enhance self-stabilization to deal efficiently with the common case of single-process transient faults. The main results are characterizations of self-stabilizing algorithms that can use error-detecting codes to recover from single-process transient faults in a single step. (C) 2000 Elsevier Science B.V. All rights reserved.

关键词： fault tolerance self-stabilization fault containment error-detecting codes

来源：评论

学校读者我要写书评

暂无评论

NEW MAPPING RULES FOR COMBINATION OF M-ARY MODULATION AND error-detecting codes IN ARQ SYSTEMS

引用

IEE PROCEEDINGS-I COMMUNICATIONS SPEECH AND VISION 1990年第4期137卷 197-204页

作者： BENELLI, G Dipartimento di Ingegneria Elettronica Università di Firenze Firenze Italy

In some ARQ schemes, the combination of modulation and channel coding improves the performance of a communication system. The paper describes a new method for the integration of an error-detecting code withM-ary modulation. Euclidean distances are obtained among modulated signals using successive transmissions of the same codeword larger than those obtained by other similar schemes. The results of the theoretical analysis show that the described method allows improvement of both the error probability and the throughput of an ARQ protocol with respect to other schemes.

关键词： modulation protocols ARQ protocol channel coding Modulation and coding methods Euclidean distances codes error detection codes error statistics M-ary modulation error probability error-detecting codes automatic repeat request mapping rules

来源：评论

学校读者我要写书评

暂无评论

On Single-error-detecting codes for DNA-Based Data Storage

引用

IEEE COMMUNICATIONS LETTERS 2021年第1期25卷 41-44页

作者： Weber, Jos H. de Groot, Joost A. M. van Leeuwen, Charlot J. Delft Univ Technol Dept Appl Math NL-2628 CD Delft Netherlands

DNA-based storage is considered to be a promising option to accommodate huge amounts of data. The strings of nucleotides are prone to errors though. To reduce the error probability, these strings should satisfy constraints on the ratio of A's and T's versus the number of G's and C's, and on the maximum number of repeated identical nucleotides. To deal with errors when they occur after all, it is also desirable that the set of DNA-strings possesses certain error correction or detection capabilities. This is established by designing quaternary constrained codes with a specified minimum distance. Here, maximum-sized block codes with a fixed number of G/C symbols, no symbol repetition, and a minimum Hamming distance of two are presented.

关键词： Constant-weight codes DNA-based data storage error-detecting codes runlength-limited sequences

来源：评论

学校读者我要写书评

暂无评论

Lester Hill's error-detecting codes

引用

CRYPTOLOGIA 2012年第2期36卷 88-103页

作者： Christensen, Chris Joyner, David Torres, Jenna No Kentucky Univ Dept Math & Stat Highland Hts KY 41099 USA USN Acad Annapolis MD 21402 USA

Lester S. Hill, who is known for the polygraphic cipher that he published in 1929, published three papers about error-detecting codes in 1926 and 1927, and he and Louis Weisner submitted a patent application for an error-detection machine in 1929. Hill's error-detection schemes of the 1920s were based upon number theory and matrix multiplication, and one of Hill's error-detecting codes essentially includes the encoding method for linear error-correcting codes, which was developed two decades later by Richard Hamming.

关键词： David Kahn collection error-correcting codes error-detecting codes Lester S. Hill

来源：评论

学校读者我要写书评

暂无评论

RUNLENGTH-LIMITED codes FOR SINGLE error-DETECTION IN THE MAGNETIC RECORDING CHANNEL

引用

IEEE TRANSACTIONS ON INFORMATION THEORY 1995年第3期41卷 809-815页

作者： PERRY, PN COLL MICRONESIA FSM KOLONIAMICRONESIA

An arithmetic function that assigns the value 0, 1, or 2 to each binary sequence is introduced, We call this function the error-check value. Two sequences that differ by a single symmetric error or a single shift error are shown to have different error-check values. Runlength-limited codes for detecting single errors are designed by taking a set of the constrained sequences such that each code sequence has the same error-check value, Systematic runlength-limited codes that detect single errors are constructed, based on the error-check value, It is shown that these systematic runlength-limited codes have the shortest parity length possible for a single error-detecting code.

关键词： RUNLENGTH-LIMITED codes error-detecting codes

来源：评论

学校读者我要写书评

暂无评论

Concurrent error detection methods for asynchronous burst-mode machines

引用

IEEE TRANSACTIONS ON COMPUTERS 2007年第6期56卷 785-798页

作者： Almukhaizim, Sobeeh Makris, Yiorgos Yale Univ Dept Elect Engn New Haven CT 06520 USA Yale Univ Dept Elect Engn & Comp Sci New Haven CT 06520 USA

Asynchronous controllers exhibit various characteristics that limit the effectiveness and applicability of the Concurrent error Detection (CED) methods developed for their synchronous counterparts. Asynchronous Burst-Mode Machines (ABMMs), for example, do not have a global clock to synchronize the ABMM with the additional circuitry that is typically used by synchronous CED methods (for example, duplication). Therefore, performing effective CED in ABMMs requires a synchronization method that will appropriately enable the checker (for example, comparator) in order to avoid false alarms. Also, ABMMs contain redundant logic, which guarantees the hazard-free operation required for correct interaction between the circuit and its environment. Redundant logic, however, allows some single event transients to manifest themselves only as hazards but not as logic discrepancies. Therefore, performing effective CED in ABMMs requires the ability to detect hazards with which synchronous CED methods are not concerned. In this work, we first devise hardware solutions for performing checking synchronization and hazard detection. We then demonstrate how these solutions enable the development of three complete CED methods for ABMMs. The first method (Duplication-based CED) is an adaptation of the well-known duplication method within the context of ABMMs. The second method (Transition-Trigge red CED) is a variation of duplication wherein the implementation cost is reduced by allowing hazards in the duplicate circuit. In contrast to these two methods, which are nonintrusive, the third method (Berger code-based CED) is intrusive since it requires reencoding of the ABMM with check symbols based on the Berger code. Although this intrusiveness may slightly impact performance, Berger code-based CED incurs the lowest area overhead among the three methods, as indicated through experimental results.

关键词： concurrent error detection asynchronous burst-mode machines error-detecting codes Berger code

来源：评论

学校读者我要写书评

暂无评论

LOW-COST RESIDUE codes AND THEIR APPLICATION TO SELF-CHECKING VLSI SYSTEMS

引用

IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES 1985年第4期132卷 197-202页

作者： SAYERS, IL KINNIMENT, DJ Department of Electrical and Electronic Engineering University of Newcastle upon Tyne Newcastle upon Tyne UK

The efficient application of error-detecting codes to VLSI designs requires a study of their cost and effectiveness to supplement the knowledge of their theoretical properties. The paper discusses the tradeoffs for a low-cost residue code applied to common types of VLSI hardware. Comparisons are made between the kinds of residue codes available and their suitability for use in VLSI designs. The code is then applied to a typical VLSI system for comparison with other test strategies.

关键词： Semiconductor integrated circuits Logic circuits logic testing integrated logic circuits VLSI logic design Logic design methods codes error detection codes self-checking VLSI systems error-detecting codes low cost residue codes

来源：评论

学校读者我要写书评

暂无评论

error-Detection Schemes for Analog Content-Addressable Memories

引用

IEEE TRANSACTIONS ON COMPUTERS 2024年第7期73卷 1795-1808页

作者： Roth, Ron M. Technion Comp Sci Dept IL-3200003 Haifa Israel

Analog content-addressable memories (in short, a-CAMs) have been recently introduced as accelerators for machine-learning tasks, such as tree-based inference or implementation of nonlinear activation functions. The cells in these memories contain nanoscale memristive devices, which may be susceptible to various types of errors, such as manufacturing defects, inaccurate programming of the cells, or drifts in their contents over time. The objective of this work is to develop techniques for overcoming the reliability issues that are caused by such error events. To this end, several coding schemes are presented for the detection of errors in a-CAMs. These schemes consist of an encoding stage, a detection cycle (which is performed periodically), and some minor additions to the hardware. During encoding, redundancy symbols are programmed into a portion of the a-CAM (or, alternatively, are written into an external memory). During each detection cycle, a certain set of input vectors is applied to the a-CAM. The schemes differ in several ways, e.g., in the range of alphabet sizes that they are most suitable for, in the tradeoff that each provides between redundancy and hardware additions, or in the type of errors that they handle (Hamming metric versus L(1 )metric).

关键词： Redundancy Measurement Vectors Encoding Hardware Task analysis Programming Analog computation content-addressable memory error-detecting codes Lee metric memristive devices

来源：评论

学校读者我要写书评

暂无评论

SEC BED DED codes FOR error CONTROL IN BYTE-ORGANIZED MEMORY-SYSTEMS

引用

IEEE TRANSACTIONS ON COMPUTERS 1985年第6期34卷 557-562页

作者： DUNNING, LA Department of Computer Science Bowling Green State University Bowling Green OH 4340 Abstract Authors References Cited By Keywords Metrics Similar Download Citation Email Print Request Permissions

SEC-ED-DED codes are single error correcting and double error detecting while simultaneously providing byte error detection. SEC-BED-DED codes are constructed for byte lengths of 5 and larger. For many byte lengths and code lengths, these codes require fewer check bits or have implementation advantages when compared to other SEC-BED-DED codes.

关键词： Byte errors SEC-BED-DED codes byte organization error-correcting codes error-detecting codes fault tolerance memories package failures

来源：评论

学校读者我要写书评

暂无评论

PEDS: A Parallel error Detection Scheme for TCAM Devices

引用

IEEE-ACM TRANSACTIONS ON NETWORKING 2010年第5期18卷 1665-1675页

作者： Bremler-Barr, Anat Hay, David Hendler, Danny Roth, Ron M. Interdisciplinary Ctr Efi Arazi Sch Comp Sci IL-46150 Herzliyya Israel Ben Gurion Univ Negev Dept Comp Sci IL-84105 Beer Sheva Israel Technion Israel Inst Technol Dept Comp Sci IL-32000 Haifa Israel

Ternary content-addressable memory ( TCAM) devices are increasingly used for performing high-speed packet classification. A TCAM consists of an associative memory that compares a search key in parallel against all entries. TCAMs may suffer from error events that cause ternary cells to change their value to any symbol in the ternary alphabet {"0","1","*"}. Due to their parallel access feature, standard error detection schemes are not directly applicable to TCAMs;an additional difficulty is posed by the special semantic of the "*" symbol. This paper introduces PEDS, a novel parallel error detection scheme that locates the erroneous entries in a TCAM device. PEDS is based on applying an error-detecting code to each TCAM entry and utilizing the parallel capabilities of the TCAM by simultaneously checking the correctness of multiple TCAM entries. A key feature of PEDS is that the number of TCAM lookup operations required to locate all errors depends on the number of symbols per entry in a manner that is typically orders of magnitude smaller than the number of TCAM entries. For large TCAM devices, a specific instance of PEDS requires only 200 lookups for 100-symbol entries, while a naive approach may need hundreds of thousands of lookups. PEDS allows flexible and dynamic selection of tradeoff points between robustness, space complexity, and number of lookups.

关键词： ternary content-addressable memory (TCAM) error-correcting codes error-detecting codes error detection packet classification

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：