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检索条件"主题词=field programmable analog array"

共 51 条记录，以下是31-40 订阅

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A Reconfigurable and Compact Spin-Based analog Block for Generalizable nth Power and Root Computation 20

A Reconfigurable and Compact Spin-Based Analog Block for Gen...

引用

20th IEEE-Computer-Society Annual Symposium on VLSI (ISVLSI)

作者： Tatulian, Adrian DeMara, Ronald F. Univ Cent Florida Dept Elect & Comp Engn Orlando FL 32816 USA

ISBN: (纸本)9781665439466

While square and square root are critical for vector operations, several challenges exist in their computation in the digital domain including power, area, and delay overheads. While selective computation in the analog domain is a longstanding alternative, tradeoffs of increased noise and reduced accuracy are prominent challenges. Herein, we propose a reconfigurable analog circuit which is capable of performing any nth-power and nth-root function and may be implemented within an analog or mixed-signal field programmable array. The resulting analog block of Magnetic Tunnel Junctions (MTJs) along with FET-based sensing and amplification circuits are circuit-switched-configurable with terminal-level control. Herein the design is configured to rapidly evaluate various arithmetic operations within acceptable error tolerances for selected applications. When compared to a state-of-the-art approximate digital multiplier, our design yields 97% reduction in transistor count and stable output within a period comparable to single-cycle execution. When compared to an alternative recently proposed analog multiplier, the proposed design yields improvement in error and versatility to perform generalized operations.

关键词： analog computation reconfigurable computing field programmable analog array Magnetic Tunnel Junction

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analog Control of a High-speed Atomic Force Microscope Scanner

Analog Control of a High-speed Atomic Force Microscope Scann...

引用

IEEE/ASME International Conference on Advanced Intelligent Mechatronics

作者： Yong, Y. K. Bhikkaji, B. Moheimani, S. O. R. Univ Newcastle Sch Elect Engn & Comp Sci Callaghan NSW 2308 Australia Indian Inst Technol Dept Elect Engn Madras 600036 Tamil Nadu India

ISBN: (纸本)9781457708398

A XYZ scanner is designed for fast and high resolution atomic force microscopy. The objective of this paper is to achieve a large scanning bandwidth along the X and Y axis of the scanner. Finite element analysis of the designed scanner is reported along with the experimental determination of the dynamics. Both suggest the presence of first resonant modes around 8.8 kHz and 8.9 kHz along the X and Y axis respectively. Actuating the scanner at frequencies beyond 1% of the first resonance causes mechanical vibrations and hence degradation of the images generated. Controllers are designed, using the Integral Resonant Control methodology, to damp the resonant modes, to enable fast actuation. Due to the large bandwidth of the designed scanner, a field programmable analog array (FPAA) is used for analog implementation of the controllers. High resolution images are generated at faster scanning rates in closed loop.

关键词： Atomic force microscopy Bandwidth Delay effects Force Hysteresis Resonant frequency XYZ scanner analog control atomic force microscopy atomic force microscopy field programmable analog array field programmable analogue arrays finite element analysis finite element analysis high-speed atomic force microscope scanner integral resonant control mechanical vibrations vibration control

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Phase Sensitive Detection Based on FPAA

Phase Sensitive Detection Based on FPAA

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International Conference on Materials Science and Information Technology (MSIT 2011)

作者： Gao, Jinshan Wang, Shijie Beijing Jiaotong Univ Sch Comp Sci & Informat Beijing Peoples R China Hebei Univ & Technol Sch Elect Engn & Automat Beijing Peoples R China

ISBN: (纸本)9783037853191

Application of FPAA (field programmable analog array) for the construction of phase-sensitive detector is described. The working principle of the phase sensitive detector is introduced. With software called Anadigmdesigner2, a signal selection circuit, a inverting circuit, a rectifier and a low pass filter circuit are achieved. The simulation of the phase-sensitive detector circuit designed is made. Phase rang from 75 degrees to 115 degrees, phase errors detected are below +/-0.392%.

关键词： Phase Sensitive Detector Lock in amplifier field programmable analog array Switched capacitor network

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analog circuit development system 2

Analog circuit development system

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International Conference on Computer as a Tool

作者： Jankovec, M Topic, M Univ Ljubljana Fac Elect Engn SI-1000 Ljubljana Slovenia

ISBN: (纸本)078037763X

An analog circuit development system as a support in analog circuits design procedure is described. analog circuit can be designed on a personal computer, uploaded to the board via an USB interface and immediately evaluated. The development board is based on Anadigm AN10E40 field programmable analog array (FPAA), which is controlled by a MC68UC908GP32 microcontroller, connected to the USB interface. The board features 4 analog inputs, 4 outputs and 5 selectable input/output lines. The whole system is powered from personal computer over USB 5V power lines by means of a DC-DC converter, so that it does not require any additional power supply. analog circuit design is supported by Anadigm Designer software which also features time domain simulation and filter design tools.

关键词： analog design Switched Capacitor field programmable analog array hardware development

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Research of a Mixed-signal programmable SoC Based on FPAA

Research of a Mixed-signal Programmable SoC Based on FPAA

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International Conference on Mechatronics Engineering and Computing Technology (ICMECT)

作者： Deng, Jun Tan, Huayong Liu, Luncai Liu, Lintao Sichuan Inst Solid State Circuits Chongqing 400060 Peoples R China

ISBN: (纸本)9783038351153

This paper presents a novel architecture for mixed-signal SoC, which integrates a field programmable analog array (FPAA) into a SoC based on 32-bit RISC CPU. The FPAA unit can be configured as Filter, Comparator, Gain Amplifier, and so on. The proposed mixed-signal SoC can transform the intermediate frequency (IF) analog signal to baseband digital signal and realize the real-time baseband signal processing, besides this, which can transmit the modulated IF signals which are converted from baseband signals by digital up-conversion (DUC). The proposed mixed-signal SoC is a transceiver on chip actually, due to the internal integrated IPs, such as ADC, DAC, DDC and DUC, which can provide smaller board area, lower power consumption and the system cost for the product development of transceiver. This design will have a good potential for wireless communication applications.

关键词： field programmable analog array Configurable analog Block Mixed-signal programmable SoC Transceiver

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Random Number Generator Based on Skew-tent Map and Chaotic Sampling 16

Random Number Generator Based on Skew-tent Map and Chaotic S...

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16th IEEE Asia Pacific Conference on Circuits and Systems (IEEE APCCAS) / IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia)

作者： Ergun, Salih Tanriseven, Sercan ERGTECH Res Ctr Zurich Switzerland

ISBN: (纸本)9781728193960

In this paper a novel random number generator is introduced and it is based on the Skew-tent discrete-time chaotic map. The RNG presented in this paper is made using the discrete-time chaotic map and chaotic sampling of regular waveform method together to increase the throughput and statistical quality of the output sequence. An explanation of the arithmetic model for the proposed design is given in this paper with an algebra confirmation for the generated bit stream that shows how it passes the primary four tests of the FIPS-140-2 test suit successfully. Finally the bit stream resulting from the hardware implementation of the circuit in a similar method has been confirmed to pass all NIST-800-22 test with no post processing. A presentation of the experimentally obtained results is given therefor proving the the circuit's usefulness. The proposed RNG can be built with the integrated circuit.

关键词： cryptography random number generator chaotic sampling of regular waveform field programmable analog array skew-tent map discrete-time chaos

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Studying nonlinear dynamical systems on a reconfigurable analog platform

Studying nonlinear dynamical systems on a reconfigurable ana...

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IEEE International Symposium on Circuits and Systems

作者： Odame, K. Twigg, C. M. Basu, A. Hasler, P. E. Georgia Inst Technol Sch Elect & Comp Engn Atlanta GA 30332 USA

ISBN: (纸本)9781424409204

We have developed a field programmable analog array (FPAA) that can be configured to synthesis and analyze a vast variety of circuits. This FPAA is a valuable platform for studying nonlinear dynamics in circuits, as it offers close to the flexibility of computer simulation, but with actual experimental results. We present data from a current mirror, a peak detector, and a second-order section.

关键词： current mirrors field programmable analogue arrays nonlinear dynamical systems nonlinear network analysis peak detectors current mirror field programmable analog array nonlinear dynamics peak detector reconfigurable analog pla peak detectors Nonlinear dynamical systems current mirrors field programmable analog arrays Nonlinear network analysis Nonlinear Dynamics

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Random Number Generation Using Dual Oscillator Architecture and Discrete-Time Chaos

Random Number Generation Using Dual Oscillator Architecture ...

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International Symposium on Electronics and Smart Devices (ISESD) - Smart Devices for Big Data Analytic and Machine Learning

作者： Ergun, Salih Tanriseven, Sercan ERGTECH Res Ctr Zurich Switzerland

ISBN: (纸本)9781538666708

This paper introduces a novel random number generator which is based on Bernoulli discrete-time chaotic map. In order to boost the throughput and to increase the statistical quality of the output sequence, presented RNG is designed using the discrete-time chaotic map together with the dual oscillator architecture. An arithmetic model of the suggested design had been elaborated and it has been algebraically confirmed that the generated bit stream has successfully passed all four primary tests of the FIPS-140-2 test suite. Lastly, it has also been confirmed that the bit stream, which was obtained from the hardware realization of the circuit in a similar way, has passed all the NIST-800-22 tests without any post-processing. The results obtained from the experiment and simulation, which confirm the usefulness of the circuit, are presented. We can build the suggested RNG using the integrated circuit.

关键词： discrete-time chaos random number generator bernoulli map dual oscillator architecture cryptography field programmable analog array

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Reconfigurable Embedded System for Electrocardiogram Acquisition 15

Reconfigurable Embedded System for Electrocardiogram Acquisi...

引用

15th World Congress on Health and Biomedical Informatics (MEDINFO)

作者： Kay, Marcel Seiji Iaione, Fabio Univ Fed Mato Grosso do Sul Fac Comp Campo Grande Brazil

ISBN: (纸本)9781614995647;9781614995630

Smartphones include features that offers the chance to develop mobile systems in medical field, resulting in an area called mobile-health. One of the most common medical examinations is the electrocardiogram (ECG), which allows the diagnosis of various heart diseases, leading to preventative measures and preventing more serious problems. The objective of this study was to develop a wireless reconfigurable embedded system using a FPAA (field programmable analog array), for the acquisition of ECG signals, and an application showing and storing these signals on Android smartphones. The application also performs the partial FPAA reconfiguration in real time (adjustable gain). Previous studies using FPAA usually use the development boards provided by the manufacturer (high cost), do not allow the reconfiguration in real time, use no smartphone and communicate via cables. The parameters tested in the acquisition circuit and the quality of ECGs registered in an individual were satisfactory.

关键词： M-health Electrocardiogram Embedded systems field programmable analog array

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Investigation of chained analog signal processors in programmable analog Computer

Investigation of chained analog signal processors in Program...

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11th IFAC/IEEE International Conference on programmable Devices and Embedded Systems (PDeS)

作者： Pilat, Adam Krzysztof Klocek, Jakub AGH Univ Sci & Technol Dept Automat Al A Mickiewicza 30 PL-30059 Krakow Poland OPTISTER Krakow Poland

ISBN: (纸本)9783902823144

This elaboration presents a new device based on dynamically programmable analog Signal Processors (dpASP) developed for hard real-time control applications. The developed programmable analog Computer/Controller (PAC) is an open hardware for a wide range of signal processing tasks. In this report the analog signal routing and filter based signal processing realized by the dpASP is presented. This research was focused on the signals form as they are processed and transferred between analog processors. The investigation is exampled by the low-pass filter(s) embedded into every analog processor. For complex signal processing tasks a few dpASP must be routed together. The dpASP chain is created for signal diagnosis and due to the limited resources of a single device. Final conclusions related to chaining analog processors are given.

关键词： programmable controllers analog computers sampled signals concurrent architectures real-time computers low pass filters high-order controller FPAA field programmable analog array dpASP dynamically programmable analog Signal Processor

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