It is presented an implementation, at the transistor level, of a field programmable analog array using the switched current technique (SI). programmable macro-cell blocks are designed using the class AB grounded gate ...
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It is presented an implementation, at the transistor level, of a field programmable analog array using the switched current technique (SI). programmable macro-cell blocks are designed using the class AB grounded gate memory cell which performances have been already improvd regarding to SNR and bandwidth. The configurable blocks can be sampled up to 40MHz. The proposed programmable block necessitates only a two-phase clock.
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