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19th International Conference on Digital Signal Processing (DSP)

作者： Song, Eunwoo Kang, Hong-Goo Lee, Joonil Yonsei Univ Digital Signal Proc Lab Seoul 120749 South Korea LG Elect Inc Digital TV Lab Seoul South Korea

ISBN: (纸本)9781479946129

This paper describes a fixed-point implementation method of the unified speech and audio coding (USAC) decoder that has been recently standardized by moving picture experts group (MPEG). Since the structure of USAC is too complicated to support both speech and audio signals, the quality and complexity issues must be carefully reviewed while performing fixed-point implementation. By analyzing the structure of the USAC decoder, this paper describes key ideas to successfully realize the fixed-point system. Subjective and objective test results verify that the implemented fixed-point decoder shows equivalent quality to the floating-point decoder. The average and worst cases of complexity depending on the type of encoding modes are also given in detail.

关键词： Unified speech and audio coding (USAC) speech coding audio coding fixed-point implementation

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Performance analysis and prototype filter design for perfect-reconstruction cosine-modulated filter banks with fixed-point implementation

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 2005年第8期52卷 452-456页

作者： Casey, RB Karp, T Texas Tech Univ Dept Elect & Comp Engn Lubbock TX 79409 USA

Cosine modulated filter banks have gained popularity for their ability to provide perfect, reconstruction (PR) while maintaining an efficient design and implementation. However, this effectiveness is hindered if the filter bank is implemented in the fixed-point domain where quantization, rounding, and overflow occur, and result in reconstruction errors. In this article we demonstrate how to maintain PR of the filter bank when implementing it in fixed-point number format with constant wordlength. We explore how the frequency selectivity of the analysis and synthesis filters changes from the floating point ones due to fixed-point errors and present new design criteria for filter banks that will be implemented in fixed-point number format.

关键词： cosine modulated filter banks fixed-point implementation perfect reconstruction (PR)

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NUMERICAL BEHAVIOR OF A fixed-point implementation OF THE SPLITTED GENERALIZED LEROUX-GUEGUEN ALGORITHM

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SIGNAL PROCESSING 1993年第2期33卷 197-207页

作者： FISCHER, A Universität-Gesamthochschule Duisburg Fachgebiet Nachrichtentechnik Bismarckstraβe 90 W-4100 Duisburg Germany

The splitted generalized LeRoux-Gueguen algorithm performs a least-squares estimate of autoregressive parameters. Due to its lattice structure and finite memory length it seems to be well suited to fixed-point arithmetic implementation. In the present paper the effect of round-off errors caused by such implementation is studied. This is done by computer simulation of the fixed-point implementation with varying wordlengths for characteristic quantities and comparison with a floating-point implementation as a reference. Input signals are determined by pole trajectories of the transfer functions of their autoregressive model filters. Comparison between the two implementations is carries out by a likelihood ratio. The simulation results lead to empirical guidelines for the choice of wordlengths.

关键词： fixed-point implementation NUMERICAL EFFECTS LEAST-SQUARES ALGORITHM

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Quantization analysis tool for fixed-point implementation of real time algorithms on the TMS320C5000

Quantization analysis tool for fixed-point implementation of...

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IEEE International Conference on Acoustics, Speech, and Signal Processing

作者： Kamath, S Magotra, N Shrivastava, A Texas Instruments Incorp Stafford TX 77477 USA

ISBN: (纸本)0780374029

Digital Signal Processing (DSP) chips are getting faster, with higher available performance and lower power consumption. Simultaneously, the complexity of algorithms that are being implemented on these devices is increasing rapidly. Currently, Texas Instruments (TI) has targeted the TMS320C5000, fixed point (16 bits), family of DSPs to be the most power efficient DSP engine. Implementing complex algorithms on a fixed-point platform is not a trivial task. fixed-point programs require variables to have a. quantization format, and prevent (minimize) overflow and underflow quantization errors The process of converting a successful floating-point implementation of an algorithm to fixed-point can be a long and tedious process. This paper presents software tool (Fast Quantization Tool (FaQT)), which simplifies the process of converting an algorithm from floating-point to fixed-point. The paper also presents the application of FaQT to a Noise Reduction (NR) algorithm used in speech processing for cell-phone and other audio applications.

关键词： digital signal processing chips fixed point arithmetic real-time systems interference suppression speech processing quantisation (signal) acoustic noise fixed-point implementation real time algorithms TMS320C5000 digital signal processing chips DSP chips complex algorithms fixed-point platform quantization format overflow quantization errors underflow quantization errors floating-point implementation software tool Fast Quantization Tool FaQT floating-point to fixed-point noise reduction algorithm speech processing cell-phone applications audio applications

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QRD-LSL ADAPTIVE ALGORITHMS SUITABLE FOR fixed-point implementation

QRD-LSL ADAPTIVE ALGORITHMS SUITABLE FOR FIXED-POINT IMPLEME...

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5th Advanced International Conference on Telecommunications

作者： Paleologu, Constantin Enescu, Andrei Alexandru Ciochina, Silviu Albu, Felix Univ Politehn Bucuresti Dept Telecommun Bucharest Romania

ISBN: (纸本)9781424438402

In a previous study we proposed a modified version of the recursive least-square (RLS) adaptive algorithm suitable for fixed-point implementation. Using an asymptotically unbiased estimator for the algorithm's cost function we reduced the dynamic range of this parameter. In this paper, we extend the procedure for the case of QR-decomposition-based least-squares lattice (QRD-LSL) adaptive algorithm, a "fast" member of RLS family, with good numerical properties. The reduced dynamics of the algorithm's parameters leads to facility for fixed-point implementation. The simulations performed on a fixed-point digital signal processor (DSP) sustain the practical aspects of the theoretical findings.

关键词： Adaptive filters fixed-point implementation QR-decomposition-based least-squares lattice (QRD-LSL) algorithm

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Simplified RPE Algorithm and its fixed-point implementation

Simplified RPE Algorithm and its Fixed-Point Implementation

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2011 Fourth International Conference on Intelligent Computation Technology and Automation(2011年第四届智能计算技术与自动化国际会议 ICICTA 2011)

作者： Yuan Hongxing Wu Shaoqun Zha Changjun MARVELL Technology (beijing) Ltd Hefei Branch Hefei Anhui 230001 China Institute of Vocational and Technical Education East China Normal University Shanghai 200062 Chi Department of Electronics & Electrical Engineering Hefei College Hefei Anhui 230601 China

ISBN: (纸本)9781612842899

In mobile communication it is necessary to remove acoustic echo. Most acoustic echo cancellation algorithms are sensitive to double-talk Recursive prediction error (RPE) algorithm is one of the best solutions to such problem. However integrating the algorithm into headsets is a challenging task due to conversion from floating-point to fixed-point To address this problem, the simplification approach and fixed-point implementation are proposed. Simulation results validate the simplification and its fixedpoint implementation.

关键词： Acoustic Echo Caned Recursive Prediction fixed-point implementation

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Quantization Effects on Digital-PR-Controlled Active Power Filter

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IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS 2023年第6期11卷 5785-5797页

作者： Gao, Chao He, Shan Cui, Boyuan Zhang, Boxue Ming, Lei Leung, Ka Nang Loh, Poh Chiang Chinese Univ Hong Kong Dept Elect Engn Hong Kong Hong Kong Peoples R China Aalborg Univ Dept Energy DK-9220 Aalborg Denmark Hebei Univ Technol State Key Lab Reliabil & Intelligence Elect Equipm Tianjin 300130 Peoples R China

Digital proportional-resonant (PR) controllers have proven effective when used with an active power filter (APF) to compensate for nonlinear load harmonics. Their performances may, however, degrade significantly when implemented with a low-end microcontroller due to coefficient quantization errors. The extent of the degradation depends on the chosen operator, form of the second-order resonant module, and the structure for implementing the PR controller. These three factors are now comprehensively evaluated to find suitable schemes for implementing an example sixth-order PR controller for an APF. The target is to retain accurate tracking even when realized with a low bit count. Furthermore, to quantify the analysis, the sensitivity of poles and zeros (SPZ) and the sensitivity of gain (SG) have been defined to index quantization influences on different implementations. The computed SPZ and SG trends have then been borrowed for explaining the simulation and experimental results presented in this article, and identifying three suitable realization forms with lower coefficient sensitivities.

关键词： Active power filter delta operator fixed-point implementation quantization error resonant controller

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implementation of an image stabilization system for a small digital camera

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IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 2008年第2期54卷 206-212页

作者： Moon, Jung-Ho Jung, Soo Yul Kangnung Natl Univ Dept Elect Engn Kangnung 210702 Gangwon Do South Korea Samsung Elect Digital Media Div Suwon 443742 Gyeonggi Do South Korea

This paper presents the implementation of a sensor-shift image stabilization system for a small form factor camera. Image stabilization is a family of techniques for reducing image blur resulting from minute camera shake due to hand-held shooting, thereby allowing the use of shutter speeds slower than values normally required to obtain sharp images. A prototype sensor-shift type image stabilizer module developed for a camera mobile phone is introduced and a digital control system as a part of the image stabilization system is designed and implemented on an 8-bit microcontroller through integer arithmetic in the C language. This paper focuses primarily on issues that need to be taken into consideration for fixed-point implementation of the digital controller. Experimental results are presented to demonstrate the performance of the implemented sensor-shift image stabilization system.

关键词： image stabilization digital camera fixed-point implementation digital controller

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On MSE Exit Chart Analysis and Real Time DSP implementation for Iterative (Turbo) Detection

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JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY 2011年第3期64卷 305-317页

作者： Ahmed-Ouameur, Messaoud Massicotte, Daniel Univ Quebec Trois Rivieres LSSI Dept Elect & Comp Engn Trois Rivieres PQ G9A 5H7 Canada

We investigate the use of the mean square error (MSE) transfer characteristics to examine the convergence behaviour of the iterative (turbo) multiuser detector for coded code-division multiple-access (CDMA) systems. Both MSE and mutual information (MI) based extrinsic information transfer (MSE-EXIT and MI-EXIT) chart techniques reveal the same asymptotic and convergence behaviours. An improved low complexity version of the soft interference cancellation MMSE (SIC-MMSE) detection scheme is also proposed for CDMA systems utilizing BPSK modulation. Herein, under fixed-point data representation and computation constraint a real time DSP implementation (using TMS320C6416) is suggested. EXIT charts reveal that fixed-point implementation is feasible at possibly no performance degradation. Based on the measured number of cycles of different constituent sub-functions of the proposed receiver, a data transmission rate of up to 186 Kb/s can be reached for a 5-users load and a processing gain of 7 in an AWGN channel.

关键词： Mutual information MSE EXIT Iterative detection Turbo detection Maximum code rate fixed-point implementation DSP Real time data exchange (RTDX)

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Reduced-Complexity Low-Latency Logarithmic Successive Cancellation Stack Polar Decoding for 5G New Radio and Its Software implementation

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IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY 2020年第11期69卷 12449-12458页

作者： Xiang, Luping Zhong, Shida Maunder, Robert G. Hanzo, Lajos Univ Southampton Elect & Comp Sci Southampton SO17 1BJ Hants England Shenzhen Univ Coll Elect & Informat Engn Shenzhen 518060 Peoples R China

An efficient Fast logarithmic successive cancellation stack (Log-SCS) polar decoding algorithm is proposed along with its software implementation using single instruction multiple data (SIMD) style processing. Quantitatively, we reduce the decoding complexity by 50% on average, while simultaneously attaining a decoding latency that is only 21% of that of the state-of-the-art Fast successive cancellation list (SCL) polar decoder's software implementation. This is achieved without any loss of error correction performance by applying simplified path-metric (PM) computations for the rate-0, rate-1 and repetition sub-graphs of the proposed Fast Log-SCS decoder. Furthermore, a software implementation of the 32-bit fixed-point Fast Log-SCS polar decoder is conceived for x86 processors, which maintains the same block error ratio (BLER) as the floating-point Log-SCS polar decoder. Additionally, our software implementation is accelerated using SIMD instructions by relying on 512-bit Advanced Vector Extensions (AVX-512) and recursive template meta-programming for the first time, achieving a parallelism of 16, which makes it eminently suitable for the low-latency requirements of software-defined radio systems.

关键词： Decoding Polar codes Parallel processing Complexity theory Program processors Polar codes Log-SCS decoder fixed-point implementation SIMD

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