In advanced power electronic applications such as a grid-tied solar photovoltaic (PV) inverter, control algorithms demand high-level computational support, typically provided by an expensive 32-bit digital-signal-proc...
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In advanced power electronic applications such as a grid-tied solar photovoltaic (PV) inverter, control algorithms demand high-level computational support, typically provided by an expensive 32-bit digital-signal-processor (DSP) or microcontroller. In cost-sensitive markets, this may prove to be a significant component of the overall cost of the system. Using a low-cost 16-bit microcontroller is, therefore, highly desirable. However, it poses certain challenges such as fewer bits for the mathematical and logical operations, computations in the fixed-point environment, and lower speeds. In this article, a novel per-unit integer system is proposed towards using a low-cost microcontroller for complex computations, which overcomes the above limitations while maintaining the core functionality in a fixed-point environment. An improved hybrid phase locked loop implementation scheme, that uses the p.u. integer system has also been presented, which significantly reduces the execution time for grid-synchronization. To demonstrate the performance of the proposed concepts, control of a grid-tied PV inverter has been implemented on a low-cost fixed-point microcontroller (dsPIC33FJ16GS402) as well as on an advanced DSP microcontroller (TMS320F28069). Timing analysis and experimental results for a 1 kW grid-tied PV system confirm that the performance of the system using a low-cost microcontroller is comparable to that of the advanced microcontroller.
A method for representation of floating-point numbers with the help of integers is proposed. Simple mathematical operations involving the former are also defined in the new representation. High level codes developed f...
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ISBN:
(纸本)9781424458981
A method for representation of floating-point numbers with the help of integers is proposed. Simple mathematical operations involving the former are also defined in the new representation. High level codes developed for fixed-point targets may contain floating point expressions and simple modifications in the code according to the proposed conversions can produce optimized codes consisting of only integers. These codes are seen to execute approximately 10%-40% faster.
Efficient decoding of Dual Tone Multi-Frequency (DTMF) signals can be achieved using the sub-band non-uniform discrete Fourier transform (SB-NDFT). In this paper, the details of its implementation on the ADSP-2192 pro...
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Efficient decoding of Dual Tone Multi-Frequency (DTMF) signals can be achieved using the sub-band non-uniform discrete Fourier transform (SB-NDFT). In this paper, the details of its implementation on the ADSP-2192 processor are put forward. The decoder performance in terms of its computational complexity and computational speed of this algorithm, implemented on the ADSP-2192 processor, are compared for different implementations of the SB-NDFT algorithm, with and without optimization for the chosen DSP, ADSP-2912. The algorithm is tested for various types of input signals on the DSP and these are compared with the results from Matlab(R). Problems on using other DTMF decoding algorithms that use the conventional discrete Fourier transform (DFT) and the non-uniform discrete Fourier transform (NDFT) are also addressed. (C) 2003 Elsevier B.V. All rights reserved.
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