fpga has become an essential infrastructural component in commercial cloud and datacenter for improving system performance and efficiency. Meanwhile, a heterogeneous fpga chip (Hetero-fpga) in which a multi-core Syste...
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ISBN:
(纸本)9781450361378
fpga has become an essential infrastructural component in commercial cloud and datacenter for improving system performance and efficiency. Meanwhile, a heterogeneous fpga chip (Hetero-fpga) in which a multi-core System-on-Chip (SoC) is tightly integrated with an fpga fabric has been successfully pioneered. Given its hardware-software co-programmability, Hetero-fpga is supposed to become an independent and first-class cloud computing resource with networking capabilities in order to avoid involving brawny commodity x86 servers as carriers for fpga fabrics which are usually the cases in current commercial fpga clouds from several web vendors. Following this design paradigm, we present HeFA, a self-contained Hetero-fpga array architecture in cloud. We construct a high-level hardware template as well as a software stack for the Hetero-fpga node, enabling the SoC as a primary engine to manage, coordinate and incorporate with the dominant fpga fabric. We also propose a fully scripted design flow to make HeFA as an easy-to-use cloud infrastructure. Based on these techniques, we implement an academia prototype chassis of HeFA that includes 32 Hetero-fpga nodes with Xilinx's Zynq MPSoC chips. By a customized cloud resource manager, the prototype is flexibly provisioned as either 32 individual fpga nodes or multiple scalable sub-clusters to abstract arbitrary volume of reconfigurable fabrics as on-demand cloud services. In this manner, a versatile research and educational platform is delivered for agile hardware-software co-design in scenarios such as domain-specific accelerator development, open instruction set architecture-based chip design, computer system-related experimental project, and so on.
A processing system with multiple field programmable gate array (fpga) cards is described. Each fpga card can interconnect using six I/O (up, down, left, right, front, and back) terminals. The communication network am...
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A processing system with multiple field programmable gate array (fpga) cards is described. Each fpga card can interconnect using six I/O (up, down, left, right, front, and back) terminals. The communication network among fpgas is scalable according to user design. When the system operates multi-dimensional applications, transmission efficiency among fpga improved through user-adjusted dimensionality and network topologies for different applications. We provide a fast and flexible circuit configuration method for fpgas of a multi-dimensional fpga array. To demonstrate the effectiveness of the proposed method, we assess performance and power consumption of a circuit that calculated 3D Poisson equations using the finite difference method.
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