咨询与建议

限定检索结果

文献类型

  • 51 篇 会议
  • 15 篇 期刊文献
  • 3 篇 学位论文

馆藏范围

  • 69 篇 电子文献
  • 0 种 纸本馆藏

日期分布

学科分类号

  • 61 篇 工学
    • 36 篇 电气工程
    • 36 篇 计算机科学与技术...
    • 12 篇 软件工程
    • 7 篇 控制科学与工程
    • 6 篇 信息与通信工程
    • 5 篇 机械工程
    • 5 篇 材料科学与工程(可...
    • 4 篇 电子科学与技术(可...
    • 2 篇 生物工程
    • 1 篇 力学(可授工学、理...
    • 1 篇 石油与天然气工程
  • 5 篇 理学
    • 3 篇 物理学
    • 2 篇 生物学
    • 1 篇 化学
  • 3 篇 管理学
    • 3 篇 管理科学与工程(可...
  • 2 篇 农学
    • 1 篇 作物学
  • 2 篇 医学
    • 1 篇 基础医学(可授医学...
    • 1 篇 临床医学
    • 1 篇 公共卫生与预防医...
    • 1 篇 特种医学
    • 1 篇 医学技术(可授医学...
  • 1 篇 教育学
    • 1 篇 教育学

主题

  • 69 篇 functional cover...
  • 14 篇 functional verif...
  • 12 篇 verification
  • 6 篇 system-on-chip
  • 4 篇 systemverilog
  • 4 篇 coverage
  • 4 篇 formal verificat...
  • 4 篇 system verilog
  • 3 篇 systemc
  • 3 篇 reinforcement le...
  • 3 篇 automation
  • 3 篇 universal verifi...
  • 3 篇 machine learning
  • 3 篇 uvm
  • 3 篇 network-on-chip
  • 2 篇 game play testin...
  • 2 篇 multi-core proce...
  • 2 篇 coverage analysi...
  • 2 篇 stimuli generati...
  • 2 篇 sata

机构

  • 3 篇 mentor graph cor...
  • 3 篇 univ fed campina...
  • 2 篇 amrita vishwa vi...
  • 2 篇 brno university ...
  • 2 篇 indian inst tech...
  • 1 篇 fdn bruno kessle...
  • 1 篇 intel corp folso...
  • 1 篇 ain shams univ a...
  • 1 篇 bits pilani hyde...
  • 1 篇 dayananda sagar ...
  • 1 篇 cavium networks ...
  • 1 篇 univ michigan an...
  • 1 篇 univ pisa dept i...
  • 1 篇 portland state u...
  • 1 篇 key lab of integ...
  • 1 篇 transilvania uni...
  • 1 篇 department of en...
  • 1 篇 invecas technol ...
  • 1 篇 cf-small animal ...
  • 1 篇 dfki gmbh cyber ...

作者

  • 3 篇 melcher elmar u....
  • 3 篇 soumya j.
  • 3 篇 el-ashry sameh
  • 3 篇 krishna n. vamsh...
  • 3 篇 da silva karina ...
  • 2 篇 vitullo francesc...
  • 2 篇 petri esa
  • 2 篇 salah khaled
  • 2 篇 wang jing
  • 2 篇 grosse daniel
  • 2 篇 saponara sergio
  • 2 篇 peroutka ondřej
  • 2 篇 dasgupta pallab
  • 2 篇 banerjee ansuman
  • 2 篇 li kang
  • 2 篇 drechsler rolf
  • 2 篇 fanucci luca
  • 1 篇 trudel marie-cla...
  • 1 篇 raja subramani
  • 1 篇 anu mehra

语言

  • 66 篇 英文
  • 2 篇 中文
  • 1 篇 其他
检索条件"主题词=functional coverage"
69 条 记 录,以下是31-40 订阅
排序:
A reusable coverage-driven verification environment for Network-on-Chip communication in embedded system platforms
A reusable coverage-driven verification environment for Netw...
收藏 引用
7th International Workshop on Intelligent Solutions in Embedded Systems
作者: Vitullo, Francesco Saponara, Sergio Petri, Esa Casula, Michele Fanucci, Luca Maruccia, Giuseppe Locatelli, Riccardo Coppola, Marcello Univ Pisa Dept Informat Engn Pisa Italy STMicroectronics AST Grenoble Labs Grenoble France
functional verification plays an important role in the design now of an Intellectual Property (IP) core and, in general, of an embedded system. The industrial trend of the last two decades has been to produce more and... 详细信息
来源: 评论
Using Machine Learning Clustering To Find Large coverage Holes  20
Using Machine Learning Clustering To Find Large Coverage Hol...
收藏 引用
2nd ACM/IEEE Workshop on Machine Learning for CAD (MLCAD)
作者: Gal, Raviv Simchoni, Giora Ziv, Avi IBM Res Haifa Haifa Israel
Identifying large and important coverage holes is a time-consuming process that requires expertise in the design and its verification environment. This paper describes a novel machine learning-based technique for find... 详细信息
来源: 评论
Optimized coverage-directed Random Simulation
Optimized Coverage-directed Random Simulation
收藏 引用
IEEE International High Level Design Validation and Test Workshop
作者: Ugarte, I. Sanchez, P. Univ Cantabria Microelect Engn Grp TEISA Dept ETSIIT E-39005 Santander Spain
Due to the growing complexity of modem digital systems, functional verification is still an important challenge. Current verification practice in industry and in academia includes simulation and formal techniques. Whi... 详细信息
来源: 评论
coverage Metrics for Device Level Validation of SATA and SAS Devices - An Approach  5
Coverage Metrics for Device Level Validation of SATA and SAS...
收藏 引用
5th International Conference on Intelligent Systems, Modelling and Simulation (ISMS)
作者: Subramani, Raja Penneru, Ramya Selvaraj, Glamar Radhakrishnan, Bharath Puttaiah, Krishnamurthy Tech Mahindra Integrated Engn Serv Bombay Maharashtra India
This paper highlights the significance of coverage analysis with respect to the functionality and adherence to the standard specification of SATA, SAS, NVME & eMMC Devices (SSD's, HDD's). coverage analysis... 详细信息
来源: 评论
How Good is Your Property? A New Metric for Formal Property coverage
How Good is Your Property? A New Metric for Formal Property ...
收藏 引用
2nd International Symposium of Electronics Design Automation (ISEDA)
作者: Zhao, Qianwen Zhang, Hongce Hong Kong Univ Sci & Technol Guangzhou Peoples R China
Formal property verification has been widely used in function verification, where user-specified properties are checked to ensure function correctness. However, as human verification engineers can also make mistakes w... 详细信息
来源: 评论
Faster coverage Closure: Runtime Guidance of Constrained Random Stimuli by Collected coverage
Faster Coverage Closure: Runtime Guidance of Constrained Ran...
收藏 引用
Saudi International Electronics, Communications and Photonics Conference (SIECPC)
作者: Yehia, Ahmed Mentor Graph Corp Cairo Egypt
Constrained Random Verification (CRV) provides a great value towards faster coverage closure over Directed Tests Verification. Yet, closing coverage is not an easy procedure given current designs' sizes and comple... 详细信息
来源: 评论
Optimizing Constraint Selection in a Design Verification Environment for Efficient coverage Closure
Optimizing Constraint Selection in a Design Verification Env...
收藏 引用
作者: Cooper, Vanessa R. Nova Southeastern University
学位级别:Ph.D., Doctor of Philosophy
Hardware Design Verification, commonly called verification, is the process of functionally verifying a design that was written in a Register Transfer Language (RTL) based on the specification. The most common methodol... 详细信息
来源: 评论
A methodology aimed at better integration of functional verification and RTL design
收藏 引用
DESIGN AUTOMATION FOR EMBEDDED SYSTEMS 2005年 第4期10卷 285-298页
作者: da Silva, Karina R. G. Melcher, Elmar U. K. Maia, Isaac Cunha, Henrique do N. Univ Fed Campina Grande Campina Grande PB Brazil
The advent of new 65 nm/90 nm VLSI technology and SoC design methodologies has brought an explosive growth in the complexity of modern electronic circuits. As a result, functional verification has become the major bot... 详细信息
来源: 评论
On Error Injection for NoC Platforms: A UVM-Based Generic Verification Environment
收藏 引用
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2020年 第5期39卷 1137-1150页
作者: El-Ashry, Sameh Khamis, Mostafa Ibrahim, Hala Shalaby, Ahmed Abdelsalam, Mohamed El-Kharashi, M. Watheq Ain Shams Univ Dept Comp & Syst Engn Cairo 11517 Egypt Mentor Cairo 11361 Egypt Benha Univ Fac Comp & Informat Dept Comp Sci Banha 13518 Egypt Univ Victoria Dept Elect & Comp Engn Victoria BC V8P 5C2 Canada
Error injection has become critically important for testing the reliability of newly designed hardware systems. Evaluating how a design under test (DUT) reacts to different error-injection methodologies is essential f... 详细信息
来源: 评论
Safe integration of parameterized IP
收藏 引用
INTEGRATION-THE VLSI JOURNAL 2004年 第4期37卷 193-221页
作者: Jerinic, V Müller, D Tech Univ Chemnitz D-09107 Chemnitz Germany
In order to be reused in different applications Intellectual Properties (IP) are usually parameterized. On the one hand the extensive use of parameters enables users to customize IP to their needs in different applica... 详细信息
来源: 评论