This study proposes a new simplified hybrid space vector modulation (Hsvm) algorithm for multilevel diode clamped converter (DCC). The main idea consists in combining the advantages of both space vector modulation (SV...
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This study proposes a new simplified hybrid space vector modulation (Hsvm) algorithm for multilevel diode clamped converter (DCC). The main idea consists in combining the advantages of both space vector modulation (svm) algorithms synthesised in abc and alpha beta coordinates to establish a new hybrid, simplified and generalised svm algorithm. The Hsvmalgorithm offers a simple method to compute the duration time, automatic generation of all redundant states of the adjacent switching vectors without triangles identification stage and switching sequence definition for any DCC level. Moreover, all the computational processes are performed in one unique sector thanks to the proposed new reference voltage vector defined in abc-coordinates. The proposed algorithm does not require any coordinates transformation or lookup tables. Also, it can be implemented with minimum computational burden using a low resources digital platform. The proposed Hsvm is verified through MATLAB simulation and validated experimentally using three-level DCC laboratory prototype. For high-level DDC, the Hsvm is tested in real time using hardware-in-the loop testing technology. Different case studies are performed to demonstrate the high performance of the proposed Hsvm and its ability in lowering the computational resources requirement.
To simplify space vector modulation (svm) algorithm, reduce zero-order voltage, and find the shortest switching path of the switching state vectors, a rapid and generalised svm algorithm for cascaded multilevel conver...
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To simplify space vector modulation (svm) algorithm, reduce zero-order voltage, and find the shortest switching path of the switching state vectors, a rapid and generalised svm algorithm for cascaded multilevel converter is proposed. Using coordinate transformation which leads to all basic vectors locating in the integer grids in new coordinates, the algorithm simplifies the locating of basic vectors synthesising reference vectors and also their dwell time calculation. Switching state vectors calculation based on minimum zero-order voltage criteria reduces the workload of svm. To find a most suitable switching path, the switching state vectors are mapped in three-dimensional (3D) space coordinates. Switching frequency is minimal along adjacent two sides of a unit cube's surface in 3D space coordinates, which improves performance of the converter. Finally, a three-cell seven-level converter experimental prototype is built and tested. Simulation and experimental results are consistent with the theoretical prediction, which verifies the correctness and effectiveness of the proposed algorithm.
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