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Fully autonomous materials screening methodology combining first-principles calculations, machine learning and high-performance computing system

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SCIENCE AND TECHNOLOGY OF ADVANCED MATERIALS-METHODS 2023年第1期3卷

作者： Takahashi, Akira Terayama, Kei Kumagai, Yu Tamura, Ryo Oba, Fumiyasu Tokyo Inst Technol Inst Innovat Res Lab Mat & Struct R3-7 4259 Nagatsuta ChoMidori Ku Yokohama Kanagawa 2268501 Japan Yokohama City Univ Grad Sch Med Life Sci 1-7-29 Suehiro ChoTsurumi Ku Yokohama Kanagawa 2300045 Japan RIKEN Ctr Adv Intelligence Project Tokyo Japan Tokyo Inst Technol MDX Res Ctr Element Strategy Yokohama Japan Tohoku Univ Inst Mat Res Sendai Japan Natl Inst Mat Sci Ctr Basic Res Mat Tsukuba Japan Univ Tokyo Grad Sch Frontier Sci Kashiwa Japan

Materials screening by high-throughput first-principles calculations is a powerful tool for exploring novel materials with preferable properties. Machine learning techniques are expected to accelerate materials screening by constructing surrogate models and making fast predictions. Especially, black-box optimization methods such as Bayesian optimization, repeating the construction of a prediction model and the selection of data points, have attracted much attention. In this study, we constructed an autonomous materials screening system using first-principles calculations and machine learning working on high-performance computing systems. The performance of the system was evaluated by applying the system to the exploration of high-k dielectrics using band gaps by hybrid functional calculations and dielectric constants by density functional perturbation theory calculations, respectively. The developed system identified materials with anomalous properties, as well as materials with both wide band gaps and high dielectric constants by utilizing appropriate black-box optimization methods, much faster than random exploration. The code for the developed system is published on an open repository.

关键词： Materials screening first-principles calculation machine learning high-performance computing system

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Lazy Scheduling Based Disk Energy Optimization Method

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Tsinghua Science and Technology 2020年第2期25卷 203-216页

作者： Yong Dong Juan Chen Yuhua Tang Junjie Wu Huiquan Wang Enqiang Zhou School of Computer Science National University of Defense TechnologyChangsha 410073China National Innovation Institute of Defense Technology Beijing 100091China

Reducing the energy consumption of the storage systems disk read/write requests plays an important role in improving the overall energy efficiency of high-performance computing *** propose a method to reduce disk energy consumption by delaying the dispatch of disk requests to the end of a time window,which we call time window-based lazy *** prove that sorting requests within a single time window can reduce the disk energy consumption,and we discuss the relationship between the size of the time window and the disk energy consumption,proving that the energy consumption is highly likely to decrease with increasing window *** exploit this opportunity,we propose the Lazy Scheduling based Disk Energy Optimization(LSDEO)algorithm,which adopts a feedback method to periodically adjust the size of the time window,and minimizes the local disk energy consumption by sorting disk requests within each time *** implement the LSDEO algorithm in an OS kernel and conduct both simulations and actual measurements on the algorithm,confirming that increasing the time window increases disk energy *** the average request arrival rate is 300 and the threshold of average request response time is 50 ms,LSDEO can yield disk energy savings of 21.5%.

关键词： high-performance computing system storage systems disk energy savings lazy scheduling disk seek time window

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Enhanced Energy-Efficient Scheduling for Parallel Tasks Using Partial Optimal Slacking

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COMPUTER JOURNAL 2015年第2期58卷 246-257页

作者： Su, Sen Huang, Qingjia Li, Jian Cheng, Xiang Xu, Peng Shuang, Kai Beijing Univ Posts & Telecommun State Key Lab Networking & Switching Technol Beijing 100876 Peoples R China

This paper studies the problem of energy-efficient scheduling for parallel tasks in high-performance computing systems, such as clusters and data centers. Our goal is to minimize the energy consumption of parallel tasks within a deadline constraint. Among the existing techniques that reduce the energy for computing systems, dynamic voltage and frequency scaling (DVFS) is generally considered as a promising technique that can strike a balance between the energy consumption and the performance for tasks. By using the DVFS technique, the main line of research is to slack the non-critical path tasks to reduce energy consumption of parallel tasks. However, the existing studies slack the tasks greedily and could not efficiently utilize the slack-room, i.e. the idle time of the processors. In this paper, we develop a novel slacking concept, partial optimal slacking (POS), which can take full advantage of the slack-room by slack-sharing. Our formal analysis shows that POS can lead to optimum energy reduction in the partial task set. Based on the POS concept, we propose a new scheduling algorithm for parallel tasks, namely enhanced an energy-efficient scheduling (EES) algorithm. Through extensive evaluation studies, the results demonstrate that the EES algorithm can further improve the energy efficiency of parallel tasks while meeting the deadline constraint.

关键词： energy-efficient scheduling parallel tasks directed acyclic graph deadline constraint high-performance computing system

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Morphological Processing of Binary Images using Reconfigurable computing Environments

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OPTOELECTRONICS INSTRUMENTATION AND DATA PROCESSING 2015年第3期51卷 227-233页

作者： Shashev, D. V. Shidlovskiy, S. V. Tomsk State Univ Pr Lenina 36 Tomsk 634050 Russia Tomsk Polytech Univ Tomsk 634050 Russia

The paper deals with the use of high-performance computing systems with a parallel-operation architecture to solve problems of image processing. The idea of using reconfigurable computing environments is set out. The synthesis of models of reconfigurable computing environments for some problems of binary image processing is considered, and the results of their operation are demonstrated.

关键词： image processing reconfigurable computing environments high-performance computing system

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SlimUpdate: Minimal Routing Update for performance-based Reconfigurations in Fat-Trees

SlimUpdate: Minimal Routing Update for Performance-based Rec...

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IEEE International Conference on Cluster computing (CLUSTER)

作者： Zahid, Feroz Gran, Ernst Gunnar Bogdanski, Bartosz Johnsen, Bjorn Dag Skeie, Tor Simula Res Lab Fornebu Norway Oracle Corp Oslo Norway Univ Oslo Dept Informat N-0316 Oslo Norway

ISBN: (纸本)9781467365987

As the size of high-performance computing systems grows, the number of events requiring a network reconfiguration, as well as the complexity of each reconfiguration, is likely to increase. In large systems, the probability of component failure is high. At the same time, with more network components, ensuring high utilization of network resources becomes challenging. Reconfiguration in interconnection networks, like InfiniBand (IB), typically involves computation and distribution of a new set of routes in order to maintain connectivity and performance. In general, current routing algorithms do not consider the existing routes in a network when calculating new ones. Such configuration-oblivious routing might result in substantial modifications to the existing paths, and the reconfiguration becomes costly as it potentially involves a large number of source-destination pairs. In this paper, we propose a novel routing algorithm for IB based fat-tree topologies, SlimUpdate. SlimUpdate employs techniques to preserve existing forwarding entries in switches to ensure a minimal routing update, without any performance penalty, and with minimal computational overhead. We present an implementation of SlimUpdate in OpenSM, and compare it with the current de facto fat-tree routing algorithm. Our experiments and simulations show a decrease of up to 80% in the number of total path modifications when using SlimUpdate routing, while achieving similar or even better performance than the fat-tree routing in most reconfiguration scenarios.

关键词： network routing parallel processing resource allocation trees (mathematics) HPC system SlimUpdate fat-tree topology high-performance computing system minimal routing algorithm network resource utilization performance-based network reconfiguration Bandwidth Heuristic algorithms Network topology Ports (Computers) Radiation detectors Routing Topology InfiniBand dynamic network reconfiguration high-performance computing interconnection networks minimal routing update routing algorithms Network routing Routing algorithms high performance computing Infiniband Interconnection networks Resource utilization Network reconfiguration Radiation detectors Heuristic algorithms Network topology PARALLEL PROCESSING (COMPUTERS) Reconfiguration Bandwidth topology Web resources

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Electrical, Optical and Fluidic Through-Silicon Vias for Silicon Interposer Applications

Electrical, Optical and Fluidic Through-Silicon Vias for Sil...

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IEEE 61st Electronic Components and Technology Conference (ECTC)

作者： Parekh, Mahavir S. Thadesar, Paragkumar A. Bakir, Muhannad S. Georgia Inst Technol Atlanta GA 30332 USA

ISBN: (纸本)9781612844985

Modern high-performance computing systems and data centers are implemented as many-core server systems. Current state of the art data centers have server racks with pluggable boards where each board has many multi-core processors and memory units. These boards are connected via electrical or optical cables. In such systems, communication bandwidth between the high-speed microprocessor cores and the memory is limited. To leverage full performance of these powerful chips, it is required to provide high memory bandwidth as well as effective power delivery and heat removal solutions. To address these challenges in high performance computing systems, we present a 3D packaging solution that includes a novel silicon interposer with electrical, optical, and fluidic (trimodal) interconnects and through-silicon vias (TSVs). The electrical TSVs in the silicon interposer enable power and signal delivery from motherboard to chips stacked on top of the interposer. The optical TSVs in the silicon interposer can provide ultra-high bandwidth communication between chips on different silicon interposers through motherboard level optical links. The fluidic TSVs enable a coolant to be routed from the motherboard to the chips on the silicon interposer. We have fabricated and characterized polymer-clad electrical TSVs (for low stress) with diameter that meets ITRS projections for high-performance computing systems. Using the same polymer used for the cladding of electrical TSVs, we have fabricated and characterized optical TSVs adjacent to electrical TSVs. Spin coating of the photodefinable polymer for electrical and optical TSVs is done in single step. Fabrication of fluidic TSVs can be done using the same cladding as that of the polymer-clad electrical TSVs without electroplating the copper. This leaves behind an empty polymer-clad via which can be used as a fluidic TSV.

关键词： 3D packaging solution Optical device fabrication Optical fibers Optical polymers Optical variables measurement Silicon art data centers cladding communication bandwidth copper electrical cable electrical interconnect electrical through-silicon vias electroplating fluidic TSV fluidic interconnect fluidic through-silicon vias high performance computing system high speed microprocessor core high-performance computing system integrated circuit interconnections many multicore processor many-core server system memory bandwidth memory unit motherboard level optical links optical TSV optical cable optical interconnect optical through-silicon vias photodefinable polymer pluggable boards polymer-clad electrical TSV server racks silicon interposer application three-dimensional integrated circuits

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