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COMPLEX DISJUNCTIVE DECOMPOSITION OF incompletely specified boolean functions

IEEE TRANSACTIONS ON COMPUTERS 1973年第1期C 22卷 103-110页

作者： HIGHT, SL BELL TEL LABS INC DENVERCO 80221

In this paper the Ashenhurst-Curtis theory of complex disjunctive decompositions is extended to the realm of incompletely specified boolean functions. A compatibility relation on the column vectors of the decomposition chart is introduced, which is applied to identify all possible simple disjunctive decompositions for each input partition. The assignments of the DON"T CARE (φ) conditions that are required to realize these simple decompositions are described by a vector listing the constraints on these φ"s by new boolean variables caled constrained DON"T CAREs. A compatibility relation is introduced on these vectors, caled constrained boolean vectors, which is applied to form complete decompositions. A Complete decomposition is one for which al possible simple decompositions have been combined into a complex decomposition. Throughout the procedure, the freedom of choice implied by the φ"s is maintained as far as is alllowed by the choices that have been made to achieve the decompositions.

关键词： Complex disjunctive decompositions constrained boolean vectors constrained DON"T CAREs incompletely specified boolean functions simple disjunctive decompositions vacuous and inessential variables.

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An Improved method to join BDDs for incompletely specified boolean functions 56

An Improved method to join BDDs for incompletely specified B...

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56th IEEE International Symposium on Circuits and Systems (ISCAS)

作者： Peralta, Renato D. Nespolo, Joao P. Butzen, Paulo F. Kolberg, Mariana L. Reis, Andre I. Univ Fed Rio Grande do Sul PPGC Porto Alegre RS Brazil Univ Fed Rio Grande do Sul PGMICRO Porto Alegre RS Brazil

ISBN: (纸本)9781665451093

An incompletely specified boolean function, also known as a boolean relation, can be described by any combination of its on-set, off-set, and don't care (DC) set pairs. To transform a boolean relation into a boolean function (fully specified), we have to assign the DCs from the original specification. Depending on the DCs assignment, a better function minimization may result from the original specification. This article presents a method for joining two BDDs by describing the on-set and off-set of an incompletely specified f function into a single BDD for a fully specified coverage of the function. The proposed method is compared with the Restrict, Constrain and LICompaction methods implemented by the CUDD package, which are references for this problem using BDDs. In addition to these methods, we also compare our results with the Join method, which is a more recent proposal for the problem of assigning and minimizing incompletely specified boolean functions. The LI-Compaction method presented the largest number of BDD nodes among the analyzed methods. Compared to the LICompaction method, the Restrict method produced 2.12% fewer nodes, the Constrain and Join methods produced 1.95% fewer nodes, while our method produced 24.80% fewer nodes.

关键词： incompletely specified boolean functions binary decision diagram boolean relations

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PROVIDING RELIABILITY OF PHYSICAL SYSTEMS: PARTIALLY PROGRAMMABLE CIRCUIT DESIGN

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RUSSIAN PHYSICS JOURNAL 2014年第6期57卷 847-852页

作者： Matrosova, A. Yu. Ostanin, S. A. Kirienko, I. E. Natl Res Tomsk State Univ Tomsk Russia

One of the important properties of physical systems is reliability. of their functioning, in particular, reliability of functioning of logical control components of the systems. A new approach to partially programmable circuit design that allows masking stuck-at faults at gate poles of logical circuits is considered. The logical circuit consists of gates. It is supposed that only one gate pole may be fault. There are reserved programmable blocks configurable logic blocks (CLBs) based on Look Up Table (LUT) technology that may mask the fault. First, the suggested approach in contrast to the well-known ones, allows masking any stuck-at fault rather than a part of them. Second, the approach is oriented to deriving more simple masking circuit from CLBs based on a compact description of incompletely specified functions of subcircuits.

关键词： stuck-at faults configurable logic blocks incompletely specified boolean functions

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MINIMAL INPUT SOLUTIONS

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IEEE TRANSACTIONS ON COMPUTERS 1971年第8期C 20卷 922-&页

作者： HIGHT, SL IEEE Abstract Authors References Cited By Keywords Metrics Similar Download Citation Email Print Request Permissions

Logic design problems that have inessential variables as inputs are often encountered. The required logic can be implemented without the use of these inessential variables. Such variables occur most frequently in incompletely specified functions due to the presence of DON"T CARE conditions. A circuit with a minimal number of inputs would simplify many interconnection problems. This note presents a method that treats each inessential variable as a simple disjunctive decomposition. This treatment leads to a method of identifying and removing a maximal set of inessential variables, and the removal results in a minimal input solution.

关键词： incompletely specified boolean functions inessential variables logic minimization vacuous variables.

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Generating all test patterns for stuck-at faults at a gate pole and their connection with the incompletely specified boolean function of the corresponding subcircuit 14

Generating all test patterns for stuck-at faults at a gate p...

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14th Biennial Baltic Electronic Conference (BEC)

作者： Matrosova, A. Ostanin, S. Kirienko, I. Tomsk State Univ Dept Appl Math & Cybernet Tomsk Russia

ISBN: (纸本)9781467395397

The algorithm of generating all test patterns for a stuck-at fault at a gate pole of single-output combinational circuit is suggested. It is based on the method of redefining products suggested before. It is known that a behavior of a subcircuit of a combinational circuit is presented by the incompletely specified boolean function. It means that there are the input boolean vectors of a circuit on which the value of the subcircuit output has no effect on the value of the circuit output. It is set up that the on-set vectors of a subcircuit incompletely specified boolean function are represented by all test patterns for the stuck-at 0 fault at a subcircuit output and the off-set vectors are represented by all test patterns for the stuck-at 1 fault at the same output. This result may be used for structural combinational circuit mIlllmlzIllg and for partially programmable circuit design. The experimental results are presented.

关键词： stuck-at faults test patterns incompletely specified boolean functions

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A method to join the On-set and Off-set of an incompletely boolean function into a single BDD 34

A method to join the On-set and Off-set of an incompletely b...

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34th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)

作者： Peralta, Renato D. Nespolo, Joao P. Butzen, Paulo F. Kolberg, Mariana L. Reis, Andre, I UFRGS Univ Fed Rio Grande do Sul Inst Informat Porto Alegre RS Brazil UFRGS Univ Fed Rio Grande do Sul Sch Engn Porto Alegre RS Brazil

ISBN: (纸本)9781665421706

incompletely specified boolean functions (a.k.a. boolean Relations) are defined by their On-set, Off-set, and dcset (don't care set). As the dc-set can be assigned either to the On-set or to the Off-set, a boolean relation can contain several completely specified functions that satisfy the original boolean Relation. This article proposes an algorithm for the assignment of don't cares for boolean relations represented as a couple of Binary Decision Diagrams (BDDs). The algorithm consists of exploring the On-set and Off-set of the input boolean relation represented as BDDs and joining them into a third BDD, which will have a lower number of nodes. Our algorithm showed an average reduction of 73.88% in the number of nodes compared to the On-sets of each function. In addition, the algorithm proved to be effective in reducing the number of input variables, where it presented an average reduction of 15.67%.

关键词： incompletely specified boolean functions binary decision diagram boolean relations

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Increasing Manufacturing Yield Using Partially Programmable Circuits with CLB implementation of incompletely specified boolean Function of the Corresponding Sub-circuit 18

Increasing Manufacturing Yield Using Partially Programmable ...

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IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)

作者： Matrosova, A. Ostanin, S. Kirienko, I Tomsk State Univ Tomsk Russia

ISBN: (纸本)9781479967803

The new approach to partially programmable circuit design that allows masking arbitrary gate faults of a logical circuit is considered. It is supposed that only one gate may be fault. There are reserved Configurable Logic Blocks (CLBs) based on Look Up Tables (LUTs) that may mask a gate fault. The suggested approach in comparison with the currently in use ones allows masking any gate fault but not the certain stuck-at faults at the gate poles.

关键词： stuck-at faults test patterns incompletely specified boolean functions partially programmable circuit

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Patching Circuit Design Based on Reserved CLBs 20

Patching Circuit Design Based on Reserved CLBs

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IEEE International Conference on Automation, Quality and Testing, Robotics (AQTR)

作者： Matrosova, A. Ostanin, S. Andreeva, V. Tomsk State Univ Dept Appl Math & Cybernet Tomsk Russia

ISBN: (纸本)9781467386906

The new approach to patching circuit design that allows masking any logical gate faults of combinational circuit (combinational part of sequential circuit) C is considered. It is supposed that only one gate may be fault. There are reserved Configurable Logic Blocks (CLBs) based on Look Up Tables (LUTs) that may mask a gate fault being included into the circuit through Multiplexer (MUX). The suggested approach to patching circuit design in contrast with currently in use allows keeping performance of a fault free circuit. It is suggested to include MUXs in those internal poles of circuit C that may have hard detectable faults. Experimental results showed that masking LUT based circuits are as a rule, rather simple.

关键词： stuck-at faults arbitrary faults test patterns incompletely specified boolean functions patching circuit design

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Increasing Manufacturing Yield Using Partially Programmable Circuits with CLB implementation of incompletely specified boolean Function of the Corresponding Sub-circuit

Increasing Manufacturing Yield Using Partially Programmable ...

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IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems

作者： A. Matrosova S. Ostanin I. Kirienko Tomsk State University

ISBN: (纸本)9781479967810

关键词： Stuck-at faults Test patterns incompletely specified boolean functions Partially programmable circuit

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