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On Architectural Support for instruction set randomization

ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION 2020年第4期17卷 1–26页

作者： Christou, George Vasiliadis, Giorgos Papaefstathiou, Vassilis Papadogiannakis, Antonis Ioannidis, Sotiris Fdn Res & Technol Hellas FORTH ICS Iraklion Greece Tech Univ Crete TUC ECE Khania Greece

instruction set randomization (ISR) is able to protect against remote code injection attacks by randomizing the instruction set of each process. Thereby, even if an attacker succeeds to inject code, it will fail to execute on the randomized processor. The majority of existing ISR implementations is based on emulators and binary instrumentation tools that unfortunately: (i) incur significant runtime performance overheads, (ii) limit the ease of deployment, (iii) cannot protect the underlying operating system kernel, and (iv) are vulnerable to evasion attempts that bypass the ISR protection itself. To address these issues, we present the design and implementation of ASIST, an architecture with both hardware and operating system support for ISR. ASIST uses our extended SPARC processor that is mapped onto a FPGA board and runs our modified Linux kernel to support the new features. In particular, before executing a new user-level process, the operating system loads its randomization key into a newly defined register, and the modified processor decodes the process's instructions with this key. Besides that, ASIST uses a separate randomization key for the operating system to protect the base system against attacks that exploit kernel vulnerabilities to run arbitrary code with elevated privileges. Our evaluation shows that ASIST can transparently protect both user-land applications and the operating system kernel from code injection and code reuse attacks. with about 1.5% runtime overhead when using simple encryption schemes, such as XOR and Transposition;more secure ciphers, such as AES, even though they are much more complicated for mapping them to hardware, they are still within acceptable margins,with approximately 10% runtime overhead, when efficiently leveraging the spatial locality of code through modern instruction cache configurations.

关键词： Code injection instruction set randomization hardware assisted security

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Protecting instruction set randomization from Code Reuse Attacks 23rd

Protecting Instruction Set Randomization from Code Reuse Att...

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23rd Nordic Conference on Secure IT Systems (NordSec)

作者： Guanciale, Roberto KTH Royal Inst Technol Dept Theoret Comp Sci Stockholm Sweden

ISBN: (纸本)9783030036386;9783030036379

instruction set randomization (ISR) prevents code injection by randomizing the instruction encoding used by programs, thus preventing an attacker from preparing a payload that can be injected in a victim. In this paper we show that code-reuse attacks can be used to circumvent existing ISR techniques and we demonstrate these attacks on an ARMv7 CPU that has been extended with ISR support. To counter this treat, we propose a new ISR that does not have the same vulnerabilities as the existing solutions, imposes moderate decryption cost, does not require additional memory per instruction, and affords efficient random access to the encrypted code. These properties enable efficient hardware implementation of our solution. In order to evaluate our proposal, we implement the new ISR in a hardware simulator and we compare its overhead with respect to existing ISR.

关键词： instruction set randomization Code injection Code-reuse attacks

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SOFIA: Software and control flow integrity architecture

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COMPUTERS & SECURITY 2017年 68卷 16-35页

作者： de Clercq, Ruan Goetzfried, Johannes Uebler, David Maene, Pieter Verbauwhede, Ingrid Katholieke Univ Leuven ESAT COSIC Leuven Belgium Katholieke Univ Leuven IMEC Leuven Belgium FAU Erlangen Nuremberg Dept Comp Sci Erlangen Germany

Software components are frequently used in cyber-physical systems (CPSes) to control a physical mechanism, such as a valve or brakes on a car. These systems are extremely sensitive to software vulnerabilities, as their exploitation could lead to injury, damage to equipment, or environmental catastrophe. This paper proposes a hardware-based security architecture called SOFIA, which protects software running on microprocessors used in CPSes. SOFIA provides mechanisms to protect software integrity and control flow integrity. This allows the processor to defend against a large number of attacks, including code injection, code reuse, and fault-based attacks on the program counter. In addition, the architecture also defends against software copyright infringement and reverse engineering. All protection mechanisms are enforced in hardware using cryptographic techniques. We are the first to propose a mechanism to enforce control flow integrity at the finest possible granularity using cryptographic techniques. A SOFIA core has been created by implementing the proposed architectural features on a LEON3 microprocessor. The SOFIA core requires that its software conforms to a strict format. To this end, we additionally designed and implemented a software toolchain to compile source code that adheres to the formatting rules. Several benchmarks were compiled with the SOFIA toolchain, and were executed on a SOFIA core running on an FPGA, showing an average total execution time overhead of 106% compared to an unmodified LEON3 core. Our hardware evaluation shows a clock speed reduction of 23.2%. (C) 2017 Published by Elsevier Ltd.

关键词： Control flow integrity Hardware Security Computer architecture instruction set randomization

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Diversifying SQL to prevent injection attacks 14

Diversifying SQL to prevent injection attacks

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Joint 14th IEEE Int Conf on Trust, Secur and Privacy in Comp and Commun / 13th IEEE Int Symposium on Parallel and Distributed Proc with Applications / 9th IEEE Int Conf on Big Data Science and Engineering (IEEE TrustCom-ISPA-BigDataSE)

作者： Rauti, Sampsa Teuhola, Jukka Leppanen, Ville Univ Turku Dept Informat Technol Turku 20014 Finland

ISBN: (纸本)9781467379526

This paper proposes an idea of diversification to make SQL resistant against injection attacks. Our solution is based on a novel two-layered approach. It allows the SQL server to support several different instruction sets so that the SQL symbols used by every application are different. The internal SQL symbols used by the server are also uniquely diversified. We also tested our approach by applying it to MySQL server. We show that it prevents several injection attacks that earlier proxy-based solutions cannot catch. Because our solution only quickly decodes the randomized SQL symbols in the query when it arrives to the server, it does not cause any significant performance losses contrary to a proxy-based solution. The queries in applications that use the SQL server need to be diversified accordingly, but this could be done automatically to a great extent.

关键词： SQL injection diversification instruction set randomization SQL SQL SERVER diversification Servers Injections instruction sets Signs and symbols

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Programmable Decoder and Shadow Threads: Tolerate Remote Code Injection Exploits with Diversified Redundancy 14

Programmable Decoder and Shadow Threads: Tolerate Remote Cod...

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Design, Automation and Test in Europe Conference and Exhibition (DATE)

作者： Liu, Ziyi Shi, Weidong Xu, Shouhuai Lin, Zhiqiang Univ Houston Dept Comp Sci Houston TX 77004 USA Univ Texas San Antonio Dept Comp Sci San Antonio TX 78249 USA Univ Texas Dallas Dept Comp Sci Dallas TX 75080 USA

ISBN: (纸本)9783981537024

We present a lightweight hardware framework for providing high assurance detection and prevention of code injection attacks using a lockstep diversified shadow execution. Recent studies show that hardware diversification can detect software attacks by checking the consistency of their behavior simultaneously. Unfortunately, the severe performance degradation and extra system costs caused by these methods are unacceptable in many applications. This paper presents a hardware-level, lockstep shadow thread framework to enrich the diversity of the software execution, with the facilitation from programmable hardware decoder and novel CPU support of tightly coupled shadow thread technique. Specifically, given a piece of (legacy) binary code, we first generate diversified binary versions using an offline binary rewriter and programmable hardware binary translator at runtime. Two diversified binary code images are launched as dual simultaneous threads in the hardware layer with one as the primary thread and the other one as shadow thread. instructions from the shadow thread are not executed but just compared, and thus incur no OS side-effects. The extended CPU is able to decode instructions from both threads, and dispatch them to the next stage pipeline for a lockstep comparison. Any mismatch of the decoded instructions from the two threads caused by remotely injected binary code will be detected. Our design provides instruction set randomization (ISR) with minimal cost in performance, when compared with straightforward ISR implementation. The simulation results indicate that our framework incurs very small overheads and provides a protection against code injection attacks.

关键词： binary codes decoding security of data CPU support code injection attack diversified binary code image diversified redundancy hardware diversification hardware level shadow thread framework high assurance detection instruction set randomization lightweight hardware lockstep diversified shadow execution lockstep shadow thread framework offline binary rewriter programmable decoder programmable hardware binary translator programmable hardware decoder remote code injection software attack software execution diversity Benchmark testing Binary codes Decoding Hardware instruction sets Pipelines Radiation detectors

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Exploiting Code Diversity to Enhance Code Virtualization Protection 24

Exploiting Code Diversity to Enhance Code Virtualization Pro...

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24th IEEE International Conference on Parallel and Distributed Systems (ICPADS)

作者： Xue, Chao Tang, Zhanyong Ye, Guixin Li, Guanghui Gong, Xiaoqing Wangg, Wei Fang, Dingyi Wang, Zheng Northwest Univ Sch Informat Sci & Technol Xian Shaanxi Peoples R China Univ Lancaster Sch Comp & Commun Metalab Lancaster England

ISBN: (纸本)9781538673089

Code virtualization built upon virtual machine (VM) technologies is emerging as a viable method for implementing code obfuscation to protect programs against unauthorized analysis. State-of-the-art VM-based protection approaches use a fixed set of virtual instructions and bytecode interpreters across programs. This, however, exposes a security vulnerability where an experienced attacker can use knowledge extracted from other programs to quickly uncover the mapping between virtual instructions and native code for applications protected under the same scheme. In this paper, we propose a novel VM-based code obfuscation system to address this problem. The core idea of our approach is to obfuscate the mapping between the opcodes of bytecode instructions and their semantics. We achieve this by partitioning each protected code region into multiple segments where the mapping of opcodes and their semantics is randomized in different ways in different segments. In this way, each bytecode instruction will be translated into different native code in different sections of the obfuscated code. This significantly increases the diversity of the program behavior. As a result, the knowledge of bytecode to native code mappings obtained from other programs will be less useful when targeting a new program. We evaluate our approach on a set of real-world applications and compare it against two state-of-the-art VM-based code obfuscation approaches. Experimental results show that our approach is effective, which provides stronger protection with comparable runtime overhead and code size.

关键词： Virtualized obfuscation reverse engineering instruction set randomization analysis knowledge

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Hardware-Assisted Program Execution Integrity: HAPEI 23rd

Hardware-Assisted Program Execution Integrity: HAPEI

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23rd Nordic Conference on Secure IT Systems (NordSec)

作者： Lashermes, Ronan Le Bouder, Helene Thomas, Gael INRIA RBA SED & LHS Rennes France IMT Atlantique Brest France DGA MI Bruz France

ISBN: (纸本)9783030036386;9783030036379

Even if a software is proven sound and secure, an attacker can still insert vulnerabilities with fault attacks. In this paper, we propose HAPEI, an instruction set randomization scheme to guarantee Program Execution Integrity even in the presence of hardware fault injection. In particular, we propose a new solution to the multi-predecessors problem. This scheme is then implemented as a hardened CHIP-8 virtual machine, able to ensure program execution integrity, to prove the viability and to explore the limits of HAPEI.

关键词： Program execution integrity Control flow integrity Hardware fault attacks instruction set randomization

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A Moving Target Defense Approach Towards Security And Resilience In Cyber-Physical Systems

A Moving Target Defense Approach Towards Security And Resili...

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作者： Bradley David Potteiger Vanderbilt University

学位级别：博士

Cyber-Physical Systems (CPS) such as autonomous vehicles are becoming widely utilized throughout society. CPS are unique with respect to the tightly coupled nature between the cyber software and physical dynamics of a system, increasing the reliability and precision of safety-critical processes. However, with these benefits comes potential tradeoffs including the increased openness and connectivity of safety-critical components. Applications traditionally designed to be standalone and protected through physical means are now becoming vulnerable to remote attacks not only within the continental United States, but by foreign adversaries around the globe. By leveraging memory corruption vulnerabilities such as buffer overflows, attackers can remotely perform code injection, code reuse, and non-control data attacks to hijack key functionality. This dissertation focuses on leveraging Moving Target Defense (MTD) techniques such as ISR, ASR, and DSR to create a secure runtime environment, preventing attackers from obtaining the reconnaissance knowledge necessary to exploit memory corruption vulnerabilities. Furthermore, in modern day CPS, it is not enough to protect against cyber-attacks, but it is equally as important to guarantee safety. By developing a novel security architecture integrating MTD protections with control reconfiguration, we can proactively defend against code injection, code reuse, and non-control data attacks, while rapidly detecting and recovering from attacks, ensuring that safe and reliable operation is maintained.

关键词： Data Space randomization Address Space randomization instruction set randomization Cyber-Physical Systems Cybersecurity Moving Target Defense Autonomous Vehicles

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Invalidating Analysis Knowledge for Code Virtualization Protection Through Partition Diversity

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IEEE ACCESS 2019年 7卷 169160-169173页

作者： Wang, Wei Li, Meng Tang, Zhanyong Wang, Huanting Ye, Guixin Wang, Fuwei Ren, Jie Gong, Xiaoqing Fang, Dingyi Wang, Zheng Northwest Univ Sch Informat Sci & Technol Xian 710127 Peoples R China Northwest Univ Shaanxi Int Joint Res Ctr Battery Free Internet T Xian 710127 Peoples R China Shaanxi Normal Univ Sch Comp Sci Xian 710062 Peoples R China Univ Leeds Sch Comp Leeds LS2 9JT W Yorkshire England

To protect programs from unauthorized analysis, virtualize the code based on Virtual Machine (VM) technologies is emerging as a feasible method for accomplishing code obfuscation. However, in some State-of-the-art VM-based protection approaches, the set of virtual instructions and bytecode interpreters are fixed across the whole programs. This means an experienced attacker could extract the mapping information between virtual instructions and native code from programs, and use this knowledge to uncover the mapping relationships in similar protecting applications. To address this problem, we present CoDiver (Code Virtualization Protection with Diversity), a novel VM-based code obfuscation system in this paper. The main idea of our approach is to obfuscate the mapping between the opcodes of bytecode instructions and their semantics. To achieve this goal, we first turn every protected code region into multiple parts by partition proceeding, randomize the mapping of opcodes and their semantics of each part. By this way, we could translate the bytecode instruction into different native code in different sections of the obfuscated code. This method could increase the diversity of program behavior significantly. As a result, it will be useless to learn the mapping relationship between bytecode and native code of some other programs, then migrate it into a new program. We build a prototype of CoDiver and tested it on a set of real-world applications. Experimental results show that as compared with two state-of-the-art VM-based code obfuscation approaches, our approach is more effective and could provide stronger protection with comparable runtime overhead and code size.

关键词： instruction set randomization reverse engineering virtualized obfuscation

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Integrated moving target defense and control reconfiguration for securing Cyber-Physical systems

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MICROPROCESSORS AND MICROSYSTEMS 2020年 73卷

作者： Potteiger, Bradley Zhang, Zhenkai Koutsoukos, Xenofon Vanderbilt Univ 221 Kirkland Hall Nashville TN 37235 USA Texas Tech Univ Lubbock TX 79409 USA

With the increasingly connected nature of Cyber-Physical Systems (CPS), new attack vectors are emerging that were previously not considered in the design process. Specifically, autonomous vehicles are one of the most at risk CPS applications, including challenges such as a large amount of legacy software, non-trusted third party applications, and remote communication interfaces. With zero day vulnerabilities constantly being discovered, an attacker can exploit such vulnerabilities to inject malicious code or even leverage existing legitimate code to take over the cyber part of a CPS. Due to the tightly coupled nature of CPS, this can lead to altering physical behavior in an undesirable or devastating manner. Therefore, it is no longer effective to reactively harden systems, but a more proactive approach must be taken. Moving target defense (MTD) techniques such as instruction set randomization (ISR), and address space randomization (ASR) have been shown to be effective against code injection and code reuse attacks. However, these MID techniques can result in control system crashing which is unacceptable in CPS applications since such crashing may cause catastrophic consequences. Therefore, it is crucial for MTD techniques to be complemented by control reconfiguration to maintain system availability in the event of a cyberattack. This paper addresses the problem of maintaining system and security properties of a CPS under attack by integrating moving target defense techniques, as well as detection, and recovery mechanisms to ensure safe, reliable, and predictable system operation. Specifically, we consider the problem of detecting code injection as well as code reuse attacks, and reconfiguring fast enough to ensure the safety and stability of autonomous vehicle controllers are maintained. By using MTD such as ISR, and ASR, our approach provides the advantage of preventing attackers from obtaining the reconnaissance knowledge necessary to perform code injection and co

关键词： Moving target defenses Cyber-Physical systems Resiliency instruction set randomization Address space randomization

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