We present a hierarchical technique, based on integer linear programming (ILP), to generate area-efficient layouts of relatively large complex CMOS cells in the two-dimensional (2-D or multi-row) style. First, the CMO...
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We present a hierarchical technique, based on integer linear programming (ILP), to generate area-efficient layouts of relatively large complex CMOS cells in the two-dimensional (2-D or multi-row) style. First, the CMOS circuit is partitioned into subcircuits called clusters. Next, the set of all minimum-width 1-D placements (chain covers) are generated for each cluster and form the input to the ILP model. The model aims at selecting exactly one cover for each cluster such that the overall 2-D cell width is minimized. In the process, all possible diffusion sharing between transistor chains belonging to clusters are considered; the inter-row connections that contribute to the overall cell width are also reduced. Experimental results demonstrate that the technique reduces run times by several orders of magnitude over non-hierarchical methods, and yields optimal or near-optimal layouts in most cases.
Many optimizations (of programs with loops) used in parallelizing compilers and systolic array design are based on linear transformations of loop iteration spaces. Additional important optimizations and designs are po...
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Many optimizations (of programs with loops) used in parallelizing compilers and systolic array design are based on linear transformations of loop iteration spaces. Additional important optimizations and designs are possible by using recently proposed modular mappings, which are described by linear transformations modulo a constant vector. Previous work on modular mappings focused an conditions that guarantee injectivity of a modular mapping for algorithms with rectangular index sets. This paper generalizes previous work by providing new injectivity conditions that cover the cases when the program index set has arbitrary shape and size, and the target processor array and the mapping moduli are of arbitrary size. A systematic technique to efficiently generate modular mappings is also proposed. The complexity of the proposed generation technique is O(n/sup 2/n!) for a nested loop of depth n with a rectangular index set and a target processor array with as many processors as required. A bounded search scheme is also provided for general cases. Each trial is formulated as an integer linear programming problem with at most 3n variables.
In high-level synthesis for digital signal processing systems of array structured architecture, one of the most important procedures is the scheduling. By taking into account the allocation of operations to processors...
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In high-level synthesis for digital signal processing systems of array structured architecture, one of the most important procedures is the scheduling. By taking into account the allocation of operations to processors, it is mandatory to take into account the communication time between processors. In this paper we propose a scheduling method which derives an optimal schedule achieving the minimum iteration period and latency for a given signal processing algorithm on the specified processor array. The scheduling problem is modeled as an integer linear programming and solved by an ILP solver. Furthermore, we improve the scheduling method so that it can be applied to large scale signal processing algorithms without degrading the schedule optimality.
Let Y be a convex set in R/sup k/ defined by polynomial inequalities and equations of degree at most d/spl ges/2 with integer coefficients of binary length l. We show that if Y/spl cap/Z/sup k//spl ne//spl theta/, the...
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Let Y be a convex set in R/sup k/ defined by polynomial inequalities and equations of degree at most d/spl ges/2 with integer coefficients of binary length l. We show that if Y/spl cap/Z/sup k//spl ne//spl theta/, then Y contains an integral point of binary length ld/sup O/((k/sup 4/)). For fixed k, our bound implies a polynomial-time algorithm for computing an integral point y/spl isin/Y. In particular, we extend Lenstra's theorem on the polynomial-time solvability of linearintegerprogramming in fixed dimension to semidefinite integerprogramming.
In this paper, we incorporate a representation of the non-negative extended real numbers based on the composition of linear fractional transformations with non-negative integer coefficients into the programming Langua...
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In this paper, we incorporate a representation of the non-negative extended real numbers based on the composition of linear fractional transformations with non-negative integer coefficients into the programming Language for Computable Functions (PCF) with products. We present two models for the extended language and show that they are computationally adequate with respect to the operational semantics.
Summary form only given. We present a way to automatically select, within an architectural synthesis tool, the best operand and operator number systems, in order to find the best speed/area tradeoff. This implies the ...
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ISBN:
(纸本)9780818677861
Summary form only given. We present a way to automatically select, within an architectural synthesis tool, the best operand and operator number systems, in order to find the best speed/area tradeoff. This implies the use of different number systems (redundant and non-redundant) for the same design: this is what we call mixed arithmetics. We present an integer linear programming (ILP) formulation to solve a scheduling problem.
In this paper we present a heuristic tool known as the virtual permanent reconfiguring mechanism (VPRM) which dynamically reconfigures wavelength connections in a WDM transport network with a given physical topology. ...
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In this paper we present a heuristic tool known as the virtual permanent reconfiguring mechanism (VPRM) which dynamically reconfigures wavelength connections in a WDM transport network with a given physical topology. VPRM seeks to provide an optimised semi-permanent solution of the network configuration or logical topology, and traffic flow of a WDM transport network. The tool is activated in the event of changes within network environment; these may include: (i) normal network environment changes such as a change in traffic pattern, network expansion (introduction of new nodes or increase in wavelength availability) and line shutdown for maintenance purposes and, (ii) abnormal network environment changes such as sudden power failure, and network faults. Detection of the former network changes is achieved using a threshold detection technique. The latter, changes however are detected by means of fault alarm signals from distributed fault restoration mechanisms. The VPRM employs a combination of integer linear programming (ILP) and a heuristic approach. It essentially balances the traffic utilisation throughout the network physical structure and it dynamically ensures that spare connections are available, even after a fault, prior to completion of network maintenance. Unlike other reconfiguration techniques which involve solving ILP problems, the VPRM not only balances the load distribution throughout the physical network but also reduces the overall mean traffic level within each link.
integer linear programming (ILP) is commonly used in high level and system level synthesis. It is an NP complete problem (in general cases). There exist some tool's that give an optimal solution for small ILP form...
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integer linear programming (ILP) is commonly used in high level and system level synthesis. It is an NP complete problem (in general cases). There exist some tool's that give an optimal solution for small ILP formulations. Nevertheless, these tools may not give solutions for complex formulations. We present a solution to overcome the problem of complexity in ILP formulations. We propose a partitioning methodology based on a constraint graph representing all the constraints included in any ILP formulation. To direct the partitioning, the constraint graph nodes are grouped to represent data flow graph (DFG) nodes. This reduced constraint graph can be used to partition any ILP formulation based on DFG. We illustrate this method on ILP formulation for scheduling. Results on ILP scheduling formulations are promising.
In this paper we deal with the parallel approximability of a special class of Quadratic programming (QP), called Smooth Positive Quadratic programming. This subclass of QP is obtained by imposing restrictions on the c...
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In this paper we deal with the parallel approximability of a special class of Quadratic programming (QP), called Smooth Positive Quadratic programming. This subclass of QP is obtained by imposing restrictions on the coefficients of the QP instance. The Smoothness condition restricts the magnitudes of the coefficients while the positiveness requires that all the coefficients be non-negative. Interestingly, even with these restrictions several combinatorial problems can be modeled by Smooth QP. We show NC Approximation Schemes for the instances of Smooth Positive QP. This is done by reducing the instance of QP to an instance of Positive linearprogramming, finding in NC an approximate fractional solution to the obtained program, and then rounding the fractional solution to an integer approximate solution for the original problem. Then we show how to extend the result for positive instances of bounded degree to Smooth integerprogramming problems. Finally, we formulate several important combinatorial problems as Positive Quadratic Programs (or Positive integer Programs) in packing/covering form and show that the techniques presented can be used to obtain NC Approximation Schemes for "dense" instances of such problems.
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