Vertical migration is a well known technique to improve the performance of a computer system in which the selected primitives (instruction sequences or functions) are moved to a lower level in the software/firmware hi...
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Vertical migration is a well known technique to improve the performance of a computer system in which the selected primitives (instruction sequences or functions) are moved to a lower level in the software/firmware hierarchy. Concerning the steps to be performed to apply this technique, we have taken into account in the paper the selection problem of vertical-migration candidates. To solve the selection of these sequences which leads to the highest time saving for control-store filling, a suboptimal algorithm which considers the structural aspects (interrelationships) between the candidate sequences is presented. To validate this algorithm, it has been run over a selected high number of different sets of candidate sequences, and the results obtained show that the average deviation between the suboptimal solution and the optimal one is under 5% and, on the other hand, that the computer time and memory space required to evaluate it are drastically reduced.
Phase Measurement Units (PMUs) have become the most popular and reliable device for the monitoring of power system network because it provides the real time voltage and current phasors, synchronized with Global Positi...
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ISBN:
(纸本)9781479960422
Phase Measurement Units (PMUs) have become the most popular and reliable device for the monitoring of power system network because it provides the real time voltage and current phasors, synchronized with Global Positioning System (GPS). For the observability of system, an integerlinearprogramming (ILP) method is used. It also reduces the number of PMUs and maximizes the measurement redundancy in the power system buses. This paper utilizes two approaches, Newton Raphson method and Weight Least Squares (MILS) state estimation method for estimating voltage magnitude and phase angles at each bus. The true value obtained from NR method is compared with the estimated values obtained from WLS with and without inclusion of PMU measurements. The employed techniques are tested on IEEE-14 and 30 bus system for determining the optimal points of placement of PMUs to measure the accurate voltage magnitude and phase angle at each bus.
Network-on-Chip (NoC) architecture is drawing intensive attention since it promises to maintain high performance in handling complex communication issues as the number of on-chip components increases. An effective...
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Network-on-Chip (NoC) architecture is drawing intensive attention since it promises to maintain high performance in handling complex communication issues as the number of on-chip components increases. An effective method of mapping multitask applications on multicores is necessary to effectively use the NoC potential. In this paper, we propose an approach of quadratic programming (QP) formulation at the first time for the mapping problem, and it can overcome the unacceptable complexity of integerlinearprogramming (ILP) in dealing with problems with large size due to the decrease in the number of variables. Experimental results show that, QP method is at least 10 times faster than ILP method for 20 given benchmarks.
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