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IEEE Energy Conversion Congress and Exposition

作者： Jing Wang Blake Lundstrom Ismael Mendoza Annabelle Pratt National Renewable Energy Laboratory Golden CO USA

This paper presents a systematic approach to characterize the stability of a power-hardware-in-the-loop (PHIL) platform, an important step in PHIL tests. Many existing works focus the stability assessments on the PHIL interface algorithm;however, this work considers all software and hardware subsystems that form the closed loop of the PHIL experiment and develops a complete closed-loop stability assessment. This assessment is developed in the context of a common framework that can be readily applied to other PHIL platforms. This paper presents methods for characterizing key PHIL subsystems toward obtaining transfer functions to be used for analysis. The systematic stability assessment approach is demonstrated for a case study involving PHIL testing of a solar inverter and validated using experimental data.

关键词： Stability assessment interface algorithm Power-hardware-in-the-Loop (PHIL)

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Evaluation of the interface Accuracy for Power Hardware-in-the-Loop Experiments

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ELECTRIC POWER COMPONENTS AND SYSTEMS 2017年第7期45卷 763-773页

作者： Paran, Sanaz Vu, Tuyen V. Franco, Fernand Diaz Edrington, Chris S. Florida A&M Univ Dept Elect & Comp Engn Tallahassee FL 32307 USA Florida State Univ Dept Elect & Comp Engn Ctr Adv Power Syst Tallahassee FL 32306 USA

Selecting an accurate interface algorithm is a primary goal in order to have a successful operation of power hardware-in-the-loop. The purpose of this paper is to utilize the modified damping impedance method for testing the accuracy of the interface algorithm in power hardware-in-the-loop applications in comparison to the traditional damping impedance method and ideal transformer model interfaces. The hardware-in-the-loop test-bed (a power-electronic-based system) is utilized to experimentally analyze and validate the expected advantages of the modified damping impedance method. In addition, to evaluate the power hardware-in-the-loop accuracy, a transfer function perturbation-based approach is considered to validate the results of experimentation analytically and quantitatively.

关键词： converters power hardware-in-the-loop power conversion power systems interface algorithm inverters reactive power control real-time digital signal processing voltage control

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Stability and Accuracy Analysis of Power Hardware in the Loop System with Different interface algorithms 17

Stability and Accuracy Analysis of Power Hardware in the Loo...

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17th IEEE Workshop on Control and Modeling for Power Electronics (COMPEL)

作者： Hatakeyama, Tomoyuki Riccobono, Antonino Monti, Antonello Hitachi Europe GmbH European R&D Ctr Aachen Germany Rhein Westfal TH Aachen EON Energy Res Ctr Inst Automat Complex Power Syst Aachen Germany

ISBN: (纸本)9781509018154

The power hardware in the loop (PHIL) technology allows for testing a physical device under test (DUT) connected to the real time simulated rest of system (ROS) through a power electronic interface and interface algorithm (IA). Stability and accuracy questions remain open due to the non-ideal interface converter. This paper presents a frequency-domain stability analysis and a time-domain accuracy analysis of the PHIL system with different IAs, taking into account of the delay factors in the PHIL system. Results show that the damping impedance method (DIM) IA can realize a perfectly stable PHIL system, while the ideal transformer model (ITM) IA needs be modified to stabilize the PHIL system. The voltage and current expressions at both ROS side and DUT side are derived to make considerations about the accuracy of the PHIL system. Results show that matching of the waveforms at ROS and DUT sides can be achieved for passive DUTs with the DIM IA;however, for active DUTs, the matching suffers from the delay factors.

关键词： Power hardware in the loop real-time simulator interface algorithm power electronics device power system

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A general framework for a control-based design of power and mechanical hardware-in-the-loop systems

A general framework for a control-based design of power and ...

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20th World Congress of the International-Federation-of-Automatic-Control (IFAC)

作者： Fischer, Boris Jassmann, Uwe Fraunhofer IWES Control Engn Koenigstor 59 D-34119 Kassel Germany Rhein Westfal TH Aachen Inst Automat Control D-52062 Aachen Germany Rhein Westfal TH Aachen Ctr Wind Power Drives D-52062 Aachen Germany

Many studies on power and mechanical hardware-in-the-loop (HiL) systems emphasise the importance of stability and accuracy issues. These are especially crucial for full-scale HiL systems, because their actuators, linking virtual and real parts, must not be neglected in the design of the overall system. In this paper, we propose a general, control-based strategy with a simple two-step design procedure. First, an inner control loop is designed to provide an appropriate input interface to the hardware part including said actuators. Then, the virtual software part is connected to the hardware using the notion of internal model control. A finding is that, in principle, the choice of interface directions does not matter when an inner control loop is needed because of the non-negligible actuator dynamics. Furthermore, it is demonstrated how the proposed control strategy allows for directly integrating existing software models. A simulation example with a large dynamometer for testing nacelles of wind turbines is presented to illustrate the methodology. (C) 2017, IFAC (International Federation of Automatic Control) Hosting by Elsevier Ltd. All rights reserved.

关键词： Hardware-in-the-loop real-time simulation interface algorithm dynamometer electrical power systems dynamic substructuring

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Stability and Accuracy Considerations of Power Hardware- in-the-Loop Test Benches for Wind Turbines

Stability and Accuracy Considerations of Power Hardware- in-...

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20th World Congress of the International-Federation-of-Automatic-Control (IFAC)

作者： Riccobono, Antonino Helmedag, Alexander Berthold, Anica Averous, Nurhan Rizqy De Doncker, Rik W. Monti, Antonello Rhein Westfal TH Aachen E ON Energy Res Ctr Inst Automat Complex Power Syst Aachen Germany Rhein Westfal TH Aachen E ON Energy Res Ctr Inst Power Generat & Storage Syst Aachen Germany

In Power-Hardware-In-the-Loop (PHIL) setups, the device under test (DUT) is connected to the rest of the system (ROS) running in a real-time simulator through an interface algorithm (IA) and power amplifier, which strongly influences stability and accuracy of the test setup. This paper presents a comprehensive theoretical framework for the analysis of the two aspects of a PHIL system with different IAs, and demonstrates its applicability to the design of PHIL test benches for wind turbines. For the theoretical modelling derivation, the interaction of two lumped active systems is considered. (C) 2017, IFAC (International Federation of Automatic Control) Hosting by Elsevier Ltd. All rights reserved.

关键词： Power Hardware in the Loop interface algorithm Stability Accuracy Test bench for wind drives

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A general framework for a control-based design of power and mechanical hardware-in-the-loop systems

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IFAC-PapersOnLine 2017年第1期50卷 10957-10963页

作者： Fischer B. Jassmann U. Fraunhofer IWES Control Engineering Koenigstor 59 Kassel 34119 Germany RWTH Aachen University Institute of Automatic Control and Center for Wind Power Drives Aachen 52062 Germany

关键词： dynamic substructuring dynamometer electrical power systems Hardware-in-the-loop interface algorithm real-time simulation

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Stability and Accuracy Considerations of Power Hardware- in-the-Loop Test Benches for Wind Turbines

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IFAC-PapersOnLine 2017年第1期50卷 10977-10984页

作者： Riccobono A. Helmedag A. Berthold A. Averous N.R. De Doncker R.W. Monti A. Institute for Automation of Complex Power Systems E. ON Energy Research Center RWTH Aachen University Aachen Germany Institute for Power Generation and Storage Systems E. ON Energy Research Center RWTH Aachen University Aachen Germany

关键词： Accuracy interface algorithm Power Hardware in the Loop Stability Test bench for wind drives

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Poincare-Steklov Filter in Hardware-in-the-loop Modeling

Poincare-Steklov Filter in Hardware-in-the-loop Modeling

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INTERNATIONAL SIBERIAN CONFERENCE ON CONTROL AND COMMUNICATIONS

作者： Maksimov, Mikhail Merezhin, Nikolay Lyashev, Vladimir Sinyutin, Sergey Southern Fed Univ Inst Signal Proc & Control Syst 44 Nekrasovsky St Taganrog 347928 Russia Huawei Technol Russian Res Ctr 1-7 Altufievskoe Hwy Moscow 127106 Russia

ISBN: (纸本)9781509010813

hardware-in-the-loop modeling (PHIL) is one of advanced approach for test automation and verification of complex circuits and systems. This approach is most well used in power networks and power-trains. PHIL modeling is supposed part of a system is software model whether the other part is hardware item under test. A special interface algorithm supports interaction between computer model and device under test. This algorithm has to provide stability of decomposed system and numerical convergence of the simulation results. This paper is discussed damping impedance method (DIM) and introduced new interface algorithm named generalized coupling scheme (GCS), which allows to implement interaction procedure between software and hardware parts in a simpler way. Moreover, we introduce Poincare-Steklov filter, which can be considered as hardware implementation of GCS.

关键词： interface algorithm power hardware-in-the-loop simulation stability Poincare-Steklov operator

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Improvement of Damping Impedance Method for Power Hardware in the Loop Simulations

Improvement of Damping Impedance Method for Power Hardware i...

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IEEE International Autumn Meeting on Power, Electronics and Computing (ROPEC)

作者： Aguirre, Amaury Davila, Monserrat Zuniga, Pavel Uribe, Felipe Barocio, Emilio Univ Guadalajara CUCEI Grad Program Elect Engn Guadalajara Jalisco Mexico

ISBN: (纸本)9781509037940

The aim of this study is to present an improvement of the Damping Impedance Method (DIM) interface algorithm for Power Hardware in the Loop (PHIL) simulations. The improvement is based on the calculation of the Hardware Under Test (HUT) impedance, in order to include it as part of the Damping Impedance Method to enhance its accuracy and stability. To verify the results, the improved DIM interface is simulated using MATLAB/Simulink, furthermore, a laboratory implementation of a PHIL simulation is carried out using a variable load. The stability of the interface algorithm is graphically observed using the Nyquist and Bode stability criteria, whereas the precision is validated through simulations that compare the Mean Square Error (MSE), as well as laboratory experiments.

关键词： Damping Impedance Method interface algorithm Power Hardware in the Loop simulation

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Harmonic-by-Harmonic Time Delay Compensation Method for PHIL Simulation of Low Impedance Power Systems

Harmonic-by-Harmonic Time Delay Compensation Method for PHIL...

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2015 International Symposium on Smart Electric Distribution Systems and Technologies (EDST)

作者： Guillo-Sansano, E. Roscoe, A. J. Burt, G. M. Univ Strathclyde Glasgow G1 1XQ Lanark Scotland

ISBN: (纸本)9781479977369

In PHIL simulations different time delays are introduced. Although it can be reduced, there is always some time delay. As a consequence, when the device under test is part of a low impedance power system such as: microgrids, marine or aero power systems, the simulation process becomes challenging due to the poor accuracy of the results achieved by the introduction of the time delay. Therefore, in order to accurately compensate for the inherent time delay introduced in Power Hardware in the Loop ( PHIL) simulations, a method based on phase-shifting the reference voltage signal harmonic-byharmonic and phase-by-phase is proposed. In this manner the time delay compensation will not affect to the system topology and therefore the dynamic behaviour of the original system will stay as it originally was in terms of power angles and V-I phase relationships for all the harmonics processed. In this paper, an experiment where the reference voltage is altered with 5th and 7th harmonics shows that the accuracy of PHIL simulations after the application of this compensation method is greatly improved compared with traditional methods. As a result, low impedance power systems are now able to experience an accurate PHIL simulation.

关键词： Harmonic compensation interface algorithm power hardware in the loop PHIL real time simulation accuracy stability simulation time delay low impedance power system

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