In this paper, a VLSI architecture for forwardinverse 2-ddiscretewavelettransform is presented. This design described and verified by the VHdL is synthesized by the Synopsys-synthesizer. The synthesis results show...
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ISBN:
(纸本)7543909405
In this paper, a VLSI architecture for forwardinverse 2-ddiscretewavelettransform is presented. This design described and verified by the VHdL is synthesized by the Synopsys-synthesizer. The synthesis results show that the gate-level circuit contains 7140 gates and the throughput can reach 4 M pixel/s when LSI_10K CMOS process technology is used.
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