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Enhanced iterative processing algorithms for restoration and superresolution of tactical sensor imagery

OPTICAL ENGINEERING 2004年第1期43卷 199-208页

作者： Sundareshan, MK Bhattacharjee, S Univ Arizona Dept Elect & Comp Engn Tucson AZ 85721 USA

Imagery data acquired in practice to support tactical surveillance and tracking missions in hostile environments typically suffer from a variety of degradations making it essential to subject the data to digital postprocessing aimed at restoration and superresolution before they can be used for any image exploitation tasks (visualization, target detection and characterization, etc.). A number of novel iterative techniques for resolution enhancement are presently being developed, with statistical optimization and set-theoretic estimation offering two popular approaches for algorithm design. The challenges posed by the processing needs of tactical imagery data often require greater capabilities than what the existing algorithms can offer, however, and typically require more enhanced procedures to achieve satisfactory restoration and superresolution. We outline three such enhancements: parallel projection implementation with adaptive relaxation, use of scene-derived information for constraint set design, and a hybrid statistical and set-theoretic estimation procedure. The restoration and superresolution performance of an iterative algorithm that incorporates these enhancements is illustrated by application to tactical imagery data [images acquired from state-of-the-art synthetic aperture radar (SAR) and passive millimeter-wave (PMMW) sensors]. (C) 2004 Society of Photo-optical Instrumentation Engineers.

关键词： resolution enhancement image restoration superresolution iterative algorithms image processing tactical sensors

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Mapping parallel iterative algorithms onto workstation networks

Mapping parallel iterative algorithms onto workstation netwo...

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International Symposium on High Performance Distributed Computing

作者： A. Heddaya K. Park Computer Science Department Boston University Boston MA USA

For communication-intensive parallel applications, the maximum degree of concurrency achievable is limited by the communication throughput made available by the network. In previous work (Heddaya et al., 1994) we showed experimentally that the performance of certain parallel applications running on a workstation network can be improved significantly if a congestion control protocol is used to enhance network performance. We characterize and analyze the communication requirements of a large class of supercomputing applications that fall under the category of fixed-point problems, amenable to solution by parallel iterative methods. This results in a set of interface and architectural features sufficient for the efficient implementation of the applications over a large-scale distributed system. In particular, we propose a direct link between the application and network layer, supporting congestion control actions at both ends. This in turn enhances the system's responsiveness to network congestion, improving performance. Measurements are given showing the efficacy of our scheme to support large-scale parallel computations.< >

关键词： iterative algorithms Workstations Concurrent computing Computer networks Convergence Large-scale systems Delay Local area networks Equations Application software

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Properties Of iterative algorithms In SPECT Image Reconstruction

Properties Of Iterative Algorithms In SPECT Image Reconstruc...

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IEEE Symposium on Nuclear Science (NSS/MIC)

作者： B.M.W. Tsui XiDe Zhao E.C. Frey G.T. Gullberg Department of Radiology and Curriculum in Biomedical Engineering North Carolina State University Chapel Hill USA Department of Radiology and Department of Biomedical Engineering University of Utah USA

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Objective performance assessment of five computed tomography iterative reconstruction algorithms

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JOURNAL OF X-RAY SCIENCE AND TECHNOLOGY 2016年第6期24卷 913-930页

作者： Omotayo, Azeez Elbakri, Idris CancerCare Manitoba Div Med Phys 675 McDermot Ave Winnipeg MB R3E 0V9 Canada Univ Manitoba Dept Radiol Winnipeg MB Canada Univ Manitoba Dept Phys & Astron Winnipeg MB Canada

OBJECTIVE: iterative algorithms are gaining clinical acceptance in CT. We performed objective phantom-based image quality evaluation of five commercial iterative reconstruction algorithms available on four different multi-detectorCT (MDCT) scanners at different dose levels as well as the conventional filtered back-projection (FBP) reconstruction. METHODS: Using the Catphan500 phantom, we evaluated image noise, contrast-to-noise ratio (CNR), modulation transfer function (MTF) and noise-power spectrum (NPS). The algorithms were evaluated over a CTDIvol range of 0.75-18.7 mGy on four major MDCT scanners: GE DiscoveryCT750HD (algorithms: ASIR (TM) and VEO (TM));Siemens Somatom Definition AS+ (algorithm: SAFIRE (TM));Toshiba Aquilion64 (algorithm: AIDR3D (TM));and Philips Ingenuity iCT256 (algorithm: iDose4 (TM)). Images were reconstructed using FBP and the respective iterative algorithms on the four scanners. RESULTS: Use of iterative algorithms decreased image noise and increased CNR, relative to FBP. In the dose range of 1.3-1.5 mGy, noise reduction using iterative algorithms was in the range of 11%-51% on GE DiscoveryCT750HD, 10%-52% on Siemens Somatom Definition AS+, 49%-62% on Toshiba Aquilion64, and 13%-44% on Philips Ingenuity iCT256. The corresponding CNR increase was in the range 11%-105% on GE, 11%-106% on Siemens, 85%-145% on Toshiba and 13%-77% on Philips respectively. Most algorithms did not affect the MTF, except for VEO (TM) which produced an increase in the limiting resolution of up to 30%. A shift in the peak of the NPS curve towards lower frequencies and a decrease in NPS amplitude were obtained with all iterative algorithms. VEO (TM) required long reconstruction times, while all other algorithms produced reconstructions in real time. Compared to FBP, iterative algorithms reduced image noise and increased CNR. CONCLUSIONS: The iterative algorithms available on different scanners achieved different levels of noise reduction and CNR increase while spatia

关键词： Computed tomography image quality reconstruction spatial resolution contrast noise iterative algorithms

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Space-Time Representation of iterative algorithms and the Design of Regular Processor Arrays

Space-Time Representation of Iterative Algorithms and the De...

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International Conference on Parallel Processing (ICPP)

作者： E.D. Kyriakis-Bitzaros O.G. Koufopavlou C.E. Goutis VLSI Design Laboratory Department of Electrical Engineering University of Patras Greece IBM Thomas J. Watson Research Center Hawthorne NY USA

A novel space-time representation of iterative algorithms, which can be expressed in nested loop form and may include non-constant dependencies is proposed and a systematic methodology for their mapping onto regular processor arrays is presented. In contrast to previous design methodologies, the execution time of any variable instance is explicitly expressed in the Dependence Graph, by the construction of the Space-Time Dependence Graph (STDG). This approach avoids the uniformization step of the algorithm and the requirement for fully indexing the variables.

关键词： iterative algorithms Process design Algorithm design and analysis Parallel processing Vectors Difference equations Very large scale integration Laboratories Milling machines Rivers

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Recursive versus iterative algorithms for Solving Combinatorial Search Problems in Hardware

Recursive versus Iterative Algorithms for Solving Combinator...

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International Conference on VLSI Design

作者： Iouliia Skliarova Valery Sklyarov Department of Electronics Telecommunications and Informatics IEETA University of Aveiro Aveiro Portugal

ISBN: (纸本)9780769530833;0769530834

The paper analyses and compares alternative iterative and recursive implementations of combinatorial search algorithms in hardware (in field-programmable gate arrays - FPGA, in particular). The results of experiments and comparisons for three widely used problems from this scope are presented, namely for the Boolean satisfiability, binary matrix covering, and graph coloring. The relevant comparative data have been obtained as a result of synthesis and implementation in FPGAs of the respective circuits from VHDL specifications.

关键词： iterative algorithms Search problems Hardware Field programmable gate arrays Mathematical model Circuit synthesis Clocks Algorithm design and analysis Very large scale integration Informatics

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ERROR ANALYSIS OF A CLASS OF CONSTRAINED iterative RESTORATION algorithms

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IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING 1985年第6期33卷 1593-1598页

作者： YEH, CL CHIN, RT UNIV WISCONSIN DEPT ELECT & COMP ENGNMADISONWI 53706

In this paper, we investigate the problem of noise stability in a class of iterative image restoration algorithms. The algorithm is a Gerchberg-Papoulis type algorithm that utilizes incomplete information and partial constraints to specify constraint operators for the iteration. The iteration, in the absence of noise, converges to a unique solution. In the presence of noise, the restoration is considered as an ill-posed problem. In this study, noise stability of the algorithm is investigated. A general error-analysis method is derived to predict the optimum number of iterations that minimizes the mean-square error between the ideal and the restored image. The tradeoff between signal reconstruction and noise amplification has been investigated, and it has been shown that by using prior knowledge of the signal and noise statistics, it is possible to achieve optimal restoration. Simulations have been performed to verify the theoretical results.

关键词： Error analysis iterative algorithms Image restoration Signal restoration iterative methods Extrapolation Stability Fourier transforms Signal processing algorithms Hilbert space

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Design methodology for direct mapping of iterative algorithms on array architectures

Design methodology for direct mapping of iterative algorithm...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： M.K. Birbas D.J. Soudris C.E. Goutis VLSI Design Laboratory Department of Electrical Engineering University of Patras Patras Greece

A systematic methodology for mapping a class of iterative algorithms onto processor array architectures is presented. The concept of the array architecture is combined efficiently with the existing knowledge of compiler techniques. It is considered as an initial description of the iterative algorithm Fortran-like nested loops, without the requirement of transforming it into any intermediate form such as uniform recurrent equations. The principles of Lamport's coordinate method are used. Depending on the systolic or non-systolic structure of the algorithm and/or the multidimensional mapping, the resulting architectures can be either regular arrays or piecewise regular arrays. The important subclass of algorithm known as weak single assignment codes is treated in an optimal way.< >

关键词： Design methodology iterative algorithms Very large scale integration Algorithm design and analysis Equations Multidimensional systems Hardware Parallel processing Laboratories Systolic arrays

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Analysis and modeling of sequential iterative algorithms for parallel and pipeline implementations

Analysis and modeling of sequential iterative algorithms for...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： J. Bu E.F. Deprettere Department of Electrical Engineering Delft University of Technnology Delft Netherlands

The authors present a formal technique to model and analyze sequential iterative algorithms for parallel and pipeline implementations. The objective is to transform a sequential iterative algorithm, described by nested FOR loops, into a static structure called a dependence graph (DG), from which parallelism (if any) can be detected by using both graph-theoretic and algebraic methods. The essence of the method is to find the trace of the variables in an algorithm. The DG of an algorithm is defined in terms of traces.< >

关键词： Algorithm design and analysis iterative algorithms Pipelines Systolic arrays Parallel processing Concurrent computing Design methodology Computer architecture Application software Equations

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Scheduling of iterative algorithms on FPGA with pipelined arithmetic unit

Scheduling of iterative algorithms on FPGA with pipelined ar...

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IEEE Symposium on Real-Time and Embedded Technology and Applications

作者： P. Sucha Z. Pohl Z. Hanzalek Department of Control Engineering Faculty of Electrical Engineering Czech Technical University Czech Republic Department of Signal Processing Institute of Information Theory and Automation AS CR Czech Republic

This paper presents a scheduling technique for a library of arithmetic logarithmic modules for FPGA illustrated on a RLS filter for active noise cancellation. The problem under assumption is to find an optimal periodic cyclic schedule satisfying the timing constraints. The approach is based on a transformation to monoprocessor cyclic scheduling with precedence delays. We prove that this problem is NP-hard and we suggest a solution based on integer linear programming that allows to minimize completion time. Finally experimental results of optimized RLS filter are shown.

关键词： iterative algorithms Field programmable gate arrays Arithmetic Resonance light scattering Libraries Active filters Noise cancellation Timing Delay Integer linear programming

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