The standard algorithm for computing the soft-inverse of a finite-state machine [i.e., the soft-in/soft-out (SISO) module] is the forward-backward algorithm. These forward and backward recursions can be computed in pa...
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The standard algorithm for computing the soft-inverse of a finite-state machine [i.e., the soft-in/soft-out (SISO) module] is the forward-backward algorithm. These forward and backward recursions can be computed in parallel, yielding an architecture with latency O(N), where N is the block size, We demonstrate that the standard SISO computation may be formulated using a combination of prefix and suffix operations, Based on well-known tree-structures for fast parallel prefix computations in the very large scale integration (VLSI) literature (e,g,, tree adders), we propose a tree-structured SISO that has latency O(log, N), The decrease in latency comes primarily at a cost of area with, in some cases, only a marginal increase in computation. We discuss how this structure could be used to design a very high throughput turbo decoder or, more generally, an:iterative detector. Various subwindowing and tiling schemes are also considered to further improve latency.
The performance of low-density parity-check (LDPC) codes serially concatenated with generalized partial response channels is investigated. Various soft-input/soft-output detection schemes suitable for use in iterative...
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The performance of low-density parity-check (LDPC) codes serially concatenated with generalized partial response channels is investigated. Various soft-input/soft-output detection schemes suitable for use in iterative detection/decoding systems are described. A low-complexity near-optimal detection algorithm that incorporates soft-input reliability information and generates soft-output reliability information is presented, A reduced-complexity algorithm for decoding LDPC codes is described. Simulation results on the performance of high-rate LDPC codes on generalized PR channels at various recording densities are presented, These results indicate that a judicious selection of the inner detector target polynomial and the choice of a good LDPC code are important in optimizing the performance of the overall recording system, Furthermore, the results also show that iterative detection/decoding schemes using LDPC codes can outperform hard-decision decoding of Reed-Solomon codes by over 2 dB at a sector error rate of 10(-3).
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