This paper studies an extension and improvement of the joint detection-decoding algorithm for nonbinary LDPC-coded modulation systems. The iterative jointdetection-decoding (IJDD) algorithm in [1] combines nonbinary ...
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This paper studies an extension and improvement of the joint detection-decoding algorithm for nonbinary LDPC-coded modulation systems. The iterative jointdetection-decoding (IJDD) algorithm in [1] combines nonbinary LDPC decoding with signal detection based on the hard-message passing strategy, resulting in significantly reduced decoding complexity. However, it applies only to majority-logic decodable nonbinary LDPC codes with high column weight. For nonbinary LDPC codes with low column weight, a noticeable performance loss will be incurred. To handle this problem, we propose a reliability-based iterative jointdetection-decoding (also termed improved IJDD) algorithm, which combines the accumulated reliability of symbols based on the one-step majority-logic decoding (MLGD) algorithm and a Chase-like local list decodingalgorithm. Simulation results show that the improved IJDD algorithm outperforms the IJDD algorithm by about 0.3 dB using nonbinary LDPC codes with high column weight, and by about 3 dB using nonbinary LDPC codes with low column weight (d(v) = 4), while maintaining the low complexity of decoding. Compared to the FFT-QSPA, the proposed algorithm has a performance degradation of 0.5 dB in the high column weight regime, and about 1 dB in the low column weight regime.
This study is concerned with the application of non-binary low-density parity-check (NB-LDPC) codes to binary input inter-symbol interference channels. Two low-complexity jointdetection/decodingalgorithms are propos...
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This study is concerned with the application of non-binary low-density parity-check (NB-LDPC) codes to binary input inter-symbol interference channels. Two low-complexity jointdetection/decodingalgorithms are proposed. One is referred to as max-log-MAP/X-EMS algorithm, which is implemented by exchanging soft messages between the max-log-MAP detector and the extended min-sum (EMS) decoder. The max-log-MAP/X-EMS algorithm is applicable to general NB-LDPC codes. The other one, referred to as Viterbi/GMLGD algorithm, is designed in particular for majority-logic decodable NB-LDPC codes. The Viterbi/GMLGD algorithm works in an iterative manner by exchanging hard-decisions between the Viterbi detector and the generalised majority-logic decoder (GMLGD). As a by-product, a variant of the original EMS algorithm is proposed, which is referred to as mu-EMS algorithm. In the mu-EMS algorithm, the messages are truncated according to an adaptive threshold, resulting in a more efficient algorithm. Simulations results show that the max-log-MAP/X-EMS algorithm performs as well as the traditional iterative detection/decodingalgorithm based on the BCJR algorithm and theQ-ary sum-product algorithm, but with lower complexity. The complexity can be further reduced for majority-logic decodable NB-LDPC codes by executing the Viterbi/GMLGD algorithm with a performance degradation within one dB. These algorithms provide good candidates for trade-offs between performance and complexity.
We propose a multiple-voting-based joint detection-decoding algorithm for nonbinary low density parity-check (LDPC)-coded modulation systems. This algorithm is inspired from the reliability based JDD algorithm for non...
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We propose a multiple-voting-based joint detection-decoding algorithm for nonbinary low density parity-check (LDPC)-coded modulation systems. This algorithm is inspired from the reliability based JDD algorithm for nonbinary LDPC-coded modulation systems, that has been proposed recently, in which the accumulated reliability of symbols based on one-step majority-logic decodingalgorithm and the Chase-like local list decodingalgorithm are used. However, the reliability-based JDD algorithm still has a significant performance degradation of at least 1 dB with low column weight(d(v) <= 4). In order to reduce the performance degradation with low column weight, the proposed algorithm allows unfixed number of variable nodes to pass two symbols to the associated check node, in contrast with the reliability-based JDD algorithm, which allows only one variable node to pass two symbols to check node, when updating variable-to-check messages. Moreover, the votes are weighted differently according to the components of the list in the checksum computation. Simulations show that the proposed algorithm yields better performance with low column weight, while still maintaining the low complexity feature.
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