The biggest challenge when using DNA as a storage medium is maintaining its stability. The relative occurrence of guanine (G) and cytosine (C) is essential for the longevity of DNA. In addition to that, reverse comple...
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The biggest challenge when using DNA as a storage medium is maintaining its stability. The relative occurrence of guanine (G) and cytosine (C) is essential for the longevity of DNA. In addition to that, reverse complementary base pairs should not be present in the code. These challenges are overcome by a proper choice of group homomorphisms. Algorithms for storage and retrieval of information in DNA strings are written by using kernel code. Complexities of these algorithms are less compared to the existing algorithms. Construction procedures followed in this paper are capable of constructing codes of required sizes and reverse-complement distance.
Studies on software evolution explore code churn and code velocity at the abstraction level of a company or an entire project. We argue that this approach misses the differences among abstractions layers and subsystem...
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ISBN:
(数字)9781665479561
ISBN:
(纸本)9781665479561
Studies on software evolution explore code churn and code velocity at the abstraction level of a company or an entire project. We argue that this approach misses the differences among abstractions layers and subsystems of large projects. We conduct a case study on four BSD family operating systems: DragonFlyBSD, FreeBSD, NetBSD, and OpenBSD, to investigate the evolution of code churn and code velocity across kernel and non-kernel code. We mine commits for characteristics such as annual growth rate, commit types, change type ratio, and size taxonomy, indicating code churn. Likewise, we investigate code velocity in terms of code review periods, i.e., time-to-first-response, time-to-accept, and time-to-merge. Our study provides evidence that software evolves differently at abstraction layers: kernel and non-kernel. The study finds similarities in the code base growth rate and distribution of commit types (neutral, additive, and subtractive) across BSD subsystems, however, (a) most commits contain either kernel or non-kernel code, (b) kernel commits are larger than non-kernel commits, and (c) code reviews for kernel code take longer than non-kernel code.
Understanding the evolution of software systems is crucial for advancing software engineering practices. Many studies have been devoted to exploring software evolution. However, they primarily treat software as an ent...
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Understanding the evolution of software systems is crucial for advancing software engineering practices. Many studies have been devoted to exploring software evolution. However, they primarily treat software as an entire entity and overlook the inherent differences between subsystems, which may lead to biased conclusions. In this study, we attempt to explore variations between subsystems by investigating the code feature differences between kernel and nonkernel components from an evolutionary perspective. Based on three operating systems as case studies, we examine multiple dimensions, including the code churn characteristics and code inherent characteristics. The main findings are as follows: (1) The proportion of kernel code remains relatively small, and exhibits consistent stability across the majority of versions as systems evolve. (2) kernel code exhibits higher stability in contrast to nonkernel code, characterized by a lower modification rate and finer modification granularity. The patterns of modification activities are similar in both kernel and nonkernel code, with a preference of changing code and a tendency to avoid the combination of adding and deleting code. (3) The cumulative code size and complexity of kernel files show an upward trajectory as the system evolves. (4) kernel files exhibit a significantly higher code density and complexity than nonkernel files, featuring a greater number of code line, comments, and statements, along with a larger program length, vocabulary, and volume. Conversely, kernel functions prioritize modularity and maintainability, with a significantly smaller size and lower complexity than nonkernel functions. These insights contribute to a deeper understanding of the dynamics within operating system codebases and highlight the necessity of targeted maintenance strategies for different subsystems.
Major Field-Programmable Gate Array (FPGA) vendors, such as Intel and Xilinx, provide toolchains for compiling Open Computing Language (OpenCL) to FPGAs. However, the separate host and device compilation approach advo...
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ISBN:
(纸本)9783800744435
Major Field-Programmable Gate Array (FPGA) vendors, such as Intel and Xilinx, provide toolchains for compiling Open Computing Language (OpenCL) to FPGAs. However, the separate host and device compilation approach advocated by OpenCL hides compiler optimization opportunities that can dramatically improve FPGA performance. This paper demonstrates the advantages of combined host and device compilation for OpenCL on FPGAs by presenting a series of transformations that require inter-compiler communication. Further, because of extremely long FPGA synthesis times, the overhead of recompiling the host code for each compilation of FPGA kernel code is relatively inexpensive. Our transformations are integrated with the Intel FPGA SDK for OpenCL and are evaluated on a subset of the Rodinia benchmark suite using an Altera Stratix V FPGA.
OpenCL has emerged as the de facto cross-platform standard in the GPU-based HPC computing domain. However, in FPGA-based HPC systems, OpenCL-to-FPGA compilers often yield suboptimal results due to the rigid architectu...
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ISBN:
(纸本)9781467394192
OpenCL has emerged as the de facto cross-platform standard in the GPU-based HPC computing domain. However, in FPGA-based HPC systems, OpenCL-to-FPGA compilers often yield suboptimal results due to the rigid architecture, limited shared-memory, and non-existent inter-work-item communication pathways implied by the OpenCL model. In this work, a methodology of inferring application-specific OpenCL "work-item" interfaces based on kernel code analysis is explored. A proof-of-concept prototype is implemented using an OpenCL source-to-source translator, which allows automated generation of the FPGA-based hardware accelerators directly from the OpenCL sources. The type and implementation of the inferred interface is tailored to match the data access patterns within the kernel. The inferred interface outperforms limitations of the OpenCL rigid architecture and communication model. The presented approach achieves a similar to 30x speedup over the generic memory-based approach for a 16 work-items application. A set of OpenCL coding patterns targeting FPGA-based HPC systems is also introduced. This technique is demonstrated on a popular bioinformatics algorithm, yet is applicable to any such algorithm with non-standard inter-cell communications.
Most modern computers which implement the von Neumann architecture have the risk of being attacked by modifying kernel code, because code is put in the same address space as the data. In this paper, the virtualization...
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ISBN:
(纸本)9780769535579
Most modern computers which implement the von Neumann architecture have the risk of being attacked by modifying kernel code, because code is put in the same address space as the data. In this paper, the virtualization of Harvard memory architecture is implemented as a patch to the current operating system to separate the code fetch and the data operation on the kernel code, and thus solve the problem at its root. The implementation of our virtualization is described in detail, its effectiveness to resist attacks is evaluated and the impact on the current operating system is fully analyzed. The experiment results show our approach is effective, has no side effect on the normal functions of the operating system and incurs very little overhead.
Designers can tune the ITRON-MP multiprocessor architecture, an adaptive real-time kernel specification, to various shared-memory multiprocessor architectures. ITRON-MP serves as a standard real-time kernel interface ...
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Designers can tune the ITRON-MP multiprocessor architecture, an adaptive real-time kernel specification, to various shared-memory multiprocessor architectures. ITRON-MP serves as a standard real-time kernel interface that reduces system development.
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