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检索条件"主题词=low-complexity all-digital frequency locked loop"
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Development of low-complexity all-digital frequency locked loop as 500 MHz reference clock generator for field-programmable gate array
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IET CIRCUITS DEVICES & SYSTEMS 2014年 第2期8卷 73-81页
作者: Yuwono, Sigit Han, Seok-Kyun Yoon, Giwan Cho, Han-Jin Lee, Sang-Gug Korea Adv Inst Sci & Technol Dept Informat & Commun Engn Taejon 305701 South Korea Korea Adv Inst Sci & Technol Dept Elect Engn Taejon 305701 South Korea ETRI SW SoC Convergence Res Lab Taejon South Korea
The authors report the development of an on-chip 500 MHz reference clock generator as a part of a clock manager for a field-programmable gate array. The generator is implemented in the form of an all-digital frequency... 详细信息
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