Generalised concatenated (GC) codes are well suited for error correction in flash memories for high-reliability data storage. The GC codes are constructed from inner extended binary Bose-Chaudhuri-Hocquenghem (BCH) co...
详细信息
Generalised concatenated (GC) codes are well suited for error correction in flash memories for high-reliability data storage. The GC codes are constructed from inner extended binary Bose-Chaudhuri-Hocquenghem (BCH) codes and outer Reed-Solomon codes. The extended BCH codes enable high-rate GC codes and low-complexity soft input decoding. This work proposes a decoder architecture for high-rate GC codes. For such codes, outer error and erasure decoding are mandatory. A pipelined decoder architecture is proposed that achieves a high data throughput with hard inputdecoding. In addition, a low-complexitysoftinput decoder is proposed. This softdecoding approach combines a bit-flipping strategy with algebraic decoding. The decoder components for the hard inputdecoding can be utilised which reduces the overhead for the softinputdecoding. Nevertheless, the softinputdecoding achieves a significant coding gain compared with hard inputdecoding.
暂无评论